Month: April 2019

Design of Adder Subtractors in VHDL

AIM : To Synthesize different types of adder subtractor Objectives To understand the working of different types of adder subtractor circuits To develop VHDL code to synthesize different types of adder subtractors To simulate and analyse the different types of adder subtractors Synthesis of Adder Subtractors   Large and Complex circuit are designed using structural Modeling. […]

Design of a Full Adder in VHDL

AIM :Write a VHDL Code to design a Full adder using different modeling style Objective: To understand the operation of a Full Adder, logic equation and the truth table To develop VHDL code for design of VHDL Code in different style of modeling To synthesize and simulate the Full adder circuit Theory: A Full adder […]

VHDL Programs for Half Adder

Write VHDL programs for the following circuits, check the wave forms and the hardware generated for Half Adder Objective I. To understand the function and operation of a Half Adder ii. To learn the modeling styles of Half Adder in VHDL iii. To synthesize and simulate Half Adder Theory of a Half Adder: A half adder […]

Design all gates using VHDL

Experiment-1: AIM : Design all gates using VHDL Objectives: The objective of this experiment is to: i. To revise the working of various logic gates ii. To learn the VHDL coding iii. To simulate for functional verification iv. To implement on CPLD / FPGA Symbols and Truth Table of Logic Gates: Symbol Name Symbol Truth Table […]

8051 Rotate Instructions

ROTATE INSTRUCTIONS These instruction rotate the accumulator left, or right with or without carry. The instructions are RR, RRC, RL, RLC. RL Instruction The RL instruction rotates accumulator left one bit left Figure shows how the bits rotate left internally and then bit-7 to bit-0 No flags are affected by this instruction Figure 7.1 : Rotate left […]

8051 Conditional Branch Instructions

CONDITIONAL BRANCH INSTRUCTIONS CJNE The CJNE instruction compares the first two operands and branches to the specified destination if their values are not equal. If the values are the same, execution continues with the next instruction. format example Operation Opcode/ Encoding Flags affected Byte Cycles CJNE @Rn, #immd,offset CJNE @R1, #24h,label PC=PC+3 If (Rn) <>#data PC=PC+offset If(Rn) […]

Subroutine Call and Return Instructions

Branch Type Instructions   These are of two types: Subroutine CALL Instruction JMP Instruction Unconditional JMP Conditional JMP Subroutine Call Instructions: These instructions are used to calls a subroutine located at the specified address. There are two subroutine Call instructions, theses are ACAL and LCALL instruction ACALL Instruction Size                 : Two bytes Requirement  : […]

8051 Arithmetic Instructions

Arithmetic Instructions One of the operand in arithmetic type of instruction is accumulator. Other operand, if there, will be immediate value, direct memory, register, register indirect, except in case of MUL and DIV where register B is used to hold the value of the 2nd operand. ADD   Format of Instruction Opcode/Encoding Example and Operation […]

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