8085 PIN and Signal Description

8085 introduction

The 8085 is an 8-bit microprocessor was introduced in year 1977 by Intel require +5 Volt power supply to operate. It  is built using approximately 6500 transistors and the design is based on standard Von Neumann architecture. It was binary-compatible with its predecessor Intel 8080. It requires less supporting hardware, thus allowing simpler and less expensive microcomputer systems to be built. 8085 was basically designed for control applications and hence saw a long life as a controller.


  1. 8085 is a 40-pin IC which was introduced by Intel corporation in 1977
  2. It is an 8-bit microprocessor
  3. Total of 74 instructions are supported. OPCODE length is 8-bit, so there are 256 different opcodes.
  4. All general purpose registers are 8-bits wide.
  5. It is a CISC (Complex Instruction set computer) architecture, manufactured using NMOS technology
  6. It requires a single +5V power supply to operate.
  7. It has on-chip clock generator and requires only a crystal to be connected across pin 18 and 19.
  8. 16-bit address bus and 8-bit data bus
  9. All internal operations are synchronized with respect to falling edge of the clock pulse. Internally the crystal frequency is divided by 2 to get the clock frequency that is half of crystal frequency. Standard crystal and operating frequencies are :
Figure-1: Clock Signals

Fcrystal = Range  4 to 10 MHz Range

Fclk =   Fcrystal / 2   MHz;                  So, Fclk range is from 2 to 5 MHz

Tclk =  1/Fclk             =    2 /Fcrystal

Classification of Signals

Figure 1.1 shows the classification of 8085 signal.

The various signals in a microprocessor can be classified as:

The various signals in a microprocessor can be classified as:


Sl Name of Signal Purpose
1 Power supply and Frequency signals Signals which aids in supplying power and generating frequency are associated with this type. Pins like Vcc and ground are classified under this type.
2 Address signals Signals associated with the lower order address bus and time multiplexed higher order address bus comes under this type of signals.
3 Data Signals Signals associated with data bus comes under this type.
4 Control and Status Signals Signals which are associated with timing and control unit such HOLD, RW’, WR’ etc. comes under this type of signals.
5 Interrupt Signals We know that signals like TRAP, RST 5.5 etc. are interrupt signals. Such signals come under this category.
6 Serial I/O signals These signals are used for giving serial input and output data. Signals like SID, SOD come under this category.
7 Acknowledgement Signals Signals like INTA’, HLDA acts as acknowledgement signal for 8085 microprocessor.

PIN Diagram of 8085 Microprocessor

Type of Signal Pin No. Symbol Name and function
Crystal input 1 X1 External Crystal oscilator input to produce the necessary and suitable clock operation.
2 X2
Status Signal 3 RESET OUT A high on this pin indicates that the CPU has been reset by RESET IN’.
Serial I/O 4 SOD This pin provides the serial output data. The serial data on this pin delivers its output to the seventh bit of the accumulator when SIM instruction is executed.
5 SID This is Serial Input Data pin, the serial data on this pin is loaded into the seventh bit of the accumulator when RIM instruction is executed
Interrupt Signal 6 TRAP Non-Maskable interrupt request, This can not be enabled or disabled using programs.






These are maskable interrupt request. That is, they can be enabled or disabled using programs.
Interrupt Signal 10 INTR INTR is a lowest priority interrupt request signal. INTR can be enabled or disabled by using software. Whenever INTR goes high the microprocessor completes the current instruction which is being executed and then acknowledges the INTR signal and processes it.
Acknowledgement Signal 11 INTA’ It is an Intererupt acknowledgement signal by the processor. Whenever the interrupt is received INTA’ goes high.
Address(lower Byte) / Data Bus 19-12 AD7-AD0 These pins are used for least significant bits of address bus in the first machine clock cycle and used as data bus for second and third clock cycle.
20 GND
Address Bus (upper Byte) 28-21 A15-A8 Most significant bit of memory address.
Control and status Signals 29, 33 S0, S1 S0 and S1 are status signals which provides different status and functions depending on their status.

S1 S0 Operation
0 0 Halt
0 1 Write
1 0 Read
1 1 Fetch


30 ALE ALE helps in demultiplexing the lower order address and data bus. This signal goes high during the first clock cycle and enables the lower order address bits. The lower order address bus is added to memory or any external latch
31 WR’ WR’ is an active low signal which controls the write operations of the microprocessor.

When WR’ = 0, the data is written to the memory or I/O device

32 RD’ This is an active low signal. This signal is used to control READ operation of the microprocessor. If RD’=0 then the microprocessor reads the data from memory or I/O device
34 IO/M’ IO/M’ is used to distinguishes whether the address is for memory or IO. When:

IO/M’ =1 then address is for an I/O device.

IO/M’=0 then address is assigned for the memory

35 READY READY is used by the microprocessor to check whether a peripheral is ready to accept or transfer data. These peripherals are connected to microprocessor using the READY pin. If READY is high then the periphery is ready for data transfer. If not the microprocessor waits until READY goes high.
36 RESET-IN’ This pin resets the program counter to 0 and resets interrupt enable and HLDA flip-flops. The CPU is held in reset condition until this pin is high.

However the flags and registers won’t get affected except for instruction register.

clock signal 37 CLK-OUT This pin is used for generating clock outputs from microprocessors for the other peripherals or other digital IC’s. Its frequency is always same as the frequency at which the microprocessor operates.
DMA 38 HLDA HLDA is an acknowledgement by the microprocessor in response to the HOLD signal. After the execution of HOLD request, HLDA goes low.
39 HOLD When a peripheral device need the use of buses, it will send a signal to the DMA, which in turn sends a request (HOLD signal) to the microprocesor. The microprocessor then transfers the control of the buses DMA for use by the peripheral. After the i/o activity of the peripheral device is over, the control of the buses is transferred back to processor.


40 VCC +5 Volt VCC signal


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