The following steps are generally followed while designing the logic circuits using Boolean functions.
The SOP equations are formed by ORing the product or the min-terms.
Formation of Minterm and Maxterm | ||||
A | B | C | Minterm(mi) | Maxterms(Mi) |
0 | 0 | 0 | A’B’C’ =m0 | A+B+C =M0 |
0 | 0 | 1 | A’B’C =m1 | A+B+C’ =M1 |
0 | 1 | 0 | A’BC’ =m2 | A+B’+C =M2 |
0 | 1 | 1 | A’BC =m3 | A+B’+C’ =M3 |
1 | 0 | 0 | AB’C’ =m4 | A’+B+C =M4 |
1 | 0 | 1 | AB’C =m5 | A’+B+C’ =M5 |
1 | 1 | 0 | ABC’ = m6 | A’+B’+C =M6 |
1 | 1 | 1 | ABC = m7 | A’+B’+C’ =M7 |
The input combinations for which the output equals ‘1’ is called min terms. Min-terms are also called as product terms. They are formed by the product of variable having ‘1’ value and complement of variable having ‘0’ value.
Suppose the Y(abc) =’1’ for input combinations 011, 101, 110, then the min-terns are a’bc, ab’c, and abc’.
The minterms are also represented by their equivalent decimal values M3, M5, M6
The different ways of writing the SOP equations is:
Product of sums (POS) equation is formed by ANDing the sum terms. These sum terms are also called max-terms. So, a POS equation is formed by ANDing the max-terms.
The input combinations for which the output is ‘0’ are called as max-terms. They are formed by ORing the variables having ‘0’ value and complemented of variables having ‘1’ value.
Suppose the output is ‘0’ for the input combinations 000, 010, 100, 111, the max terms are formed as:
The max-terms are:
OR
The POS equation therefore is formed :
Y(abc) = (a+b+c) . (a +b’ + c) . ( a’ + B + c) . (a’ + b’ + c’)
OR
Y(abc) = πM ( 0, 2, 4, 7)
We can use the De-Morgan’s theorem for converting SOP to POS and vice versa
Suppose the SOP equation is Y = A’BC + AB’C + ABC’ + ABC
Complement of Y = Y’ = (A’BC + AB’C + ABC’ + ABC)’
Y’ = (A’BC)’ . (AB’C)’ . (ABC’)’ . (ABC)’
= (A + B’ +C’) . (A’ + B + C’) . (A’ + B’ + C) . (A’ + B’ + C’)
Double Complement Y’’ = Y = ( (A + B’ + C’) . (A’ + B + C’) . (A’ + B’ + C) . (A’ + B’ + C’) )’
Therefore, ∑M(3,5,6,7) =πM(0,1,2,4)
Y =∑m(1,4,5,6)
=A’B’C + AB’C’ +AB’C + ABC’
Y’’ =( A’B’C + AB’C’ +AB’C + ABC’)’’
=(( A’B’C)’ . (AB’C’)’ . (AB’C)’ . (ABC’)’)’
This show that and AND-OR equation/ logic circuit can be implemented using only the NAND gates
Consider Y= (A+B)(A+C)(B+C)
Double complement Y” = ((A+B)(A+C)(B+C))”
=( (A+B)’ + (A+C)’ + (B+C)’)’
This shows that an OR-AND equation can be implemented using all NOR gates
Canonical form are special cases of SOP and POS forms. In canonical form each term consist of the literals either in complemented or un-complemented form. Based on this definition we can define canonical forms for SOP and POS
Example:
F(ABCD) = AC + AB + BC
Step-1: B is missing in minterm AC, C is missing in minterm AB, and A is missing in minterm BC
Step-2: AC(B+B’) + AB(C+C’) + BC(A+A’)
Step-3: Expand – ABC + AB’C + ABC + ABC’ + ABC + A’BC
Step-4: remove redundant terms
Therefore the canonical SOP is Y= ABC + AB’C + ABC’ + A’BC
Step-1: Check out for the missing literals in each Maxterm.
Step-2: Perform OR of each sum term with ANDING of missing literal and its complement
Step-3: Expand using distributive law.
Step-4: Remove the repetitive terms
Example:
Suppose Y=(A+C)(B+C)