Implementing with Decoders:
A decoder is a combinational circuit that converts N-bit binary information to 2N unique output lines. It is able to represent upto 2N distinct elements of coded information. General type decoders usually come in sizes of Nx2N where N is the number of input lines. With a given input, only one of the 2N output is active.
Applications of decoders:
Decoders find numerous applications in :
- BCD to 7-segmanet decoders
- BCD to Decimal Decoder
- Memory address decoders
- Instruction decoders
- In Display devices
2 to 4 Line Decoder
A 2 to 4 line decoder has 2 input lines, and 4 output lines. A decoder may also have an Enable (EN input) to enable or disable it.
|Enable Input||Selection Lines||Output Lines|
|1||0||0||1 S1‘ S0‘||0||0||0|
|1||0||1||0||1 S1‘ S0||0||0|
|1||1||0||0||0||1 S1 S0‘||0|
|1||1||1||0||0||0||1 S1 S0|
The output logic equations are given as below:
O0 = S1‘.S0‘ O1= S1‘.S0 O2 = S1.S0‘ O3 = S1.S0
Extending the Size of Decoders:
Larger size decoders can be built using small size decoder. For example constructing 3×8 decoder using 2×4 decoder. Figure shows how two decoders with enable inputs are connected together to form a 3×8 decoder.
When Enable input is Low, the upper decoder is selected, and the Enable is high, the lower decoder is selected.
A smaller decoder say 1×2 decoder with two 2×4 decoders could be used to form a 3×8 decoder. This is shown in figure below:
Show how a 5×32 decoder could be formed using smaller size decoders.
Use 3×8 decoders at the output side. A total of 4 such decoders will be required.
To select a particular decoder another 2×4 decoder on the input side will be required. Connect the output of 2×4 decoder to En input of each 3×8 decoders.
Implementing Combinational Logic with Decoders
An N x 2N decoder provides 2N minterm/product-term of N variables. Since, a Boolean function can be expressed in sum of product form(SOP), a decoder that generates the minterms together with an OR gate forms the hardware implementation of the Boolean expression.
Example: Implement a full adder using a decoder.
The sum and the carry equation for a full adder are:
S = ∑(1,2,4,7)
The outputs of the decoder represent the minterms. Full adder expressions are implemented by:
Connect the minterms of Sum expression which are (1,2,4,7) outputs of decoder to the inputs of upper OR gate
Connect the minterms of Carry expression which are (3,5,6,7) outputs of decoder to the inputs of lower OR gate
Figure-5: Implementation of Full Adder using 3×8 Decoder
An encoder is a combinational circuit that is used to convert N line to M lines (where N >=M). Examples of such circuits are Decimal to Binary Encoder, keyboard encoder etc. The table below shows the input output relationship for a decimal to binary encoder. The circuit will encode the key (from 0 to 9) and produce the keys binary value.
The SOP expression that for output A is when either K1, K3, K5, K7 or K9 is pressed.
A= K1 + K3 + K5 + K7 + K9;
Output B will be high when any of the keys : K2, K3, K6, or K7 is pressed. So
B= K2 + K3 + K6 + K7
The output C will be high when the key K4, K5, K6, or K7 is pressed, so
C= K4 + K5 + K6 + K7
Finally bit D will be high when key 8 or key 9 is pressed
D= K-8 + K-9
The figure below shows a decimal key to binary encoder