Different types of micro-controllers

Classification of Microcontrollers

Over the years the micro-controllers have evolved to new height. There are number of players who manufacture them. So, it becomes essential to know what are different types of micro-controllers. They can be categorized based on size of registers, make, memory architecture, features etc. These are listed in table 1.1 below: 8051(Intel, Philips, Atmel, Siemens, Dallas) ATMEL, TI, National, Fairchild, Hitachi, OKI, Intel, Toshiba, Microchip, Zilog, Rockwell, Motorola, ST Microelectronics, Rabbit, Silicon Laboratories, NXP Semiconductors

Table 1.1 Micro-controller Classification

1 Based on Architecture Harvard Architecture Princeton(Von-Neuman) Architecture
2 Size of Registers 4-Bit: Hitachi-HMCS40,

National-COP420,

TI-TMS1000

8-Bit:

Intel- 8048, 8051 PIC-16C56, Zilog-Z86C83, Motorola-6805, 68HC11, TI-TMS7500, Infineon-XC800

16-Bit

Intel-80C196, National-HPC16164, Hitachi-H8/532, Infineon-XE166

32-Bit

ATMEL-XMEGAA3BU, SAMD20, Intel-i960, AVR32, Infineon-XMC4000, NXP-LPC4000

3 Memory Embedded RAM and ROM  Additional External Memory
4 Instruction Set RISC CISC CISC implemented in RISC core
5 Family 8051 PIC AVR  ARM

Criteria of Selection:

Selection of a particular micro-controller depends on many factors, It mainly depends on the user actual requirement. So, the system designer, has to map the user requirement on to the best-fit micro-controller. Some of the important criteria are:

(a). System Requirement: 

based on processing requirement 4-bit, 8-bit, 16-bit etc..

(b). Memory Architecture:

Program memory(Flash, OTP, ROM, EEPROM), Data Memory(SRAM, SDRAM), on-chip and off-chip memory.

(c ) Other factors:

such as Device Availability, power management, Support, Development support, Cost etc

Harvard Vs. Princeton’s Architecture: 

US government, back in 1950s well before the invention of transistor by Shockley, asked the Princeton and the Harvard University to to design computer for military use. Two architectures after the name of the University were suggested and are described below:

Figure 2.1: Harward Vs. Princeton Architecture

 

Princeton Architecture:

This architecture is also known as Von Neuman’s Architecture proposed to have a common memory for both the data and code. The instructions were so designed to differentiate between program and data part of the instructions. Princeton architecture, because of its simplicity and high reliability and low cost, competed the other architecture developed by Harvard University.

Harvard Architecture:

Harvard University suggested use of separate data and program memory units. The program memory generally employs a separate MROM, EPROP, EEPROM or flash memory and the data memory use SRAM, SDRAM, Register memory. The program memory is used to store the program and the data memory is used to store the data. Usually the size of on-chip data memory (RAM) is lesser as compared to size of on-chip program memory. The advantage of using two separate memory is that it allows simultaneous access of the data and the instructions.

RISC Vs. CISC

Reduced instruction set computer and the complex instruction set computer are the two types of computer architecture that are based type of the instruction used. Each of the system has its own advantage and disadvantage. The two architectures are explored below:

a. CISC:

Pronounced sisk, and stands for Complex Instruction Set Computer. Most PC’s use CPU based on this architecture. For instance Intel and AMD CPU’s are based on CISC architectures. Typically CISC chips have a large amount of different and complex instructions. The philosophy behind it is that hardware is always faster than software, therefore one should make a powerful instruction set, which provides programmers with assembly instructions to do a lot with short programs. Since there is large number of instruction, such type of architecture uses a large number of addressing modes to handle the data and instructions which are external to the processor. In common CISC chips are relatively slow (compared to RISC chips) per instruction, but use little (less than RISC) instructions.

b. RISC:

RISC stands for Reduced Instruction Set Computer. RISC chips evolved around the mid-1980 as a reaction at CISC chips. This architecture use large number of registers. Apple for instance uses RISC chips. Since most of the time data is resident in the registers, therefore fewer, simpler and faster instructions would be better, than the large, complex and slower CISC instructions. Thus only few addressing modes are used in such machines. However, more instructions are needed to accomplish a task. Another advantage of RISC is that RISC architecture requires fewer transistors, which makes them easier to design and cheaper to produce. And also it’s easier to write powerful optimized compilers, since fewer instructions exist.

Updated: April 19, 2019 — 3:40 pm

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