Program to Read from externa memory


Objectives:

To learn interfacing of externam memory with 8051

To understand the intructions for accessing the memory

To develop a program to read and write data to external memory

Theory:

8051 Microcontroller on the other hand has onchip 4KB of ROM and 128B of RAM. 8052 has 8KB of program memory (ROM) and 256 bytes of data memory (RAM). For simple to less complex applications this is sufficent, but, If the program and data tend to be larger and require more memory than available on 8051/8052 then external RAM and ROM can be interfaced with 8051 microcontroller. Thus, there is a provision of connecting both external RAM and ROM i.e., Data Memory and Program.

Interfacing memory with 8051

We can interface a maximum of 64KB of Program Memory (ROM) and Data Memory (RAM) with the 8051 Microcontroller.

P0 – will be used as multiplexed address/data bus and hence cannot be used an i/o port.

Latch will be required to demultiplex the AD7 – AD0) into seperate address (A7 – A0) and data bus (D7 – D0)

P2 – may be used as dedicated high order address bus. (A15 – A8)

PSEN’ will be connected to OE of the program memory

Chip Enable of the data memory is connected throght the decoding logic NAND and inverters connected to port Pin P2.7, P2.6, P2.5 and other line P2.4 – P2.0 are connected directly to address lines A12-A8 of data memory, low order AD7-AD0 from P0.7 – P0.0) address lines are connected through a latch 74LS373 enabled by ALE signal from 8051. Port P0.0 – P0.7 are directly connected to D7 – D0 lines of data ROM memory.

Output Enable of the data memory is connected to P3.7 i.e RD’ pin of 8051

Figure below shows the interfacing of data memory 8Kx8 data ROM

If program memory (ROM) was connected the the OE’ and CE’ of program memory will be connected to PSEN of the 8051.

Use of data transfer instructions

i. Internal RAM

for internal RAM memory use address @R0 or immediate address as R1= #Nnh, additional 128bytes of data memory is always by indirect mode.

Internal Scratchpad and SFR

ADDITIONAL internal data memory RAM

8051

MOV R0, A

MOV A, #32H

MOV A, P0; from port P0

MOV A, #80h; same from P0

Not applicable, as 8051 has onlt direct addressable 128 byte register bank and scratchpad and 128 byte for SFR

8052

Same as above for 8051

MOV R0, #80H

MOV A, @R0

Ii. External Data and Program memory( ROM)

Always use indirect address for internal program memory and external data and program memory in all intel and compatible microcontrollers. These16-bit registers are DPTR and PC.

DPTR and PC can address the maximum data and code space in ROM from 0000h to FFFFh

All intel microcontrollers

MOVX A, @DPTR, data from [DPTR] data memory

MOVX @PC, A data to [PC] program memory

MOVX A, @DPTR, A data from [DPTR+A] data memory

MOVX A, @PC, A data from [PC+A] program memory

MOVX A, @DPTR ;copy the contents of the external address in DPTR to A

MOVX @DPTR, A ;copy the contents of A to the external address in DPTR

MOVC A, @A+DPTR ;copy the code byte, found at the ROM address formed by adding A and the DPTR, to A

MOVC A, @A+PC ;copy the code byte, found at the ROM address formed by adding A and the PC, to A

Example:

MOV DPTR, #1234h ; DPTR = 1234h

MOV A, #56h ;A = 56h

MOVC A,@A+DPTR;copy the contents of address 128Ah to A

MOVC A, @A+PC ; if PC = 4000h, A = 56h then ; copy the contents of address 4057h to A

There are two sets of RAM addresses between 00h and FFh : one internal and one external.

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