Solution to MPMC may 2019 GGSIPU

Solution for End Term Examination 2019

1(a) Is there some minimum pulse width required for the INTR signal in case of 8085 microprocessor? Explain with reason.          3

Solution:

Assuming 8085 microprocessor based system running at 3 MHz clock frequency

T = 1/3 x 106 = 0.333 μs

8085 checks INTR, one clock period before the last T-state of an instruction cycle. In 8085, CALL instruction requires 18 T-states.

 INTR pulse should be high at least for 17.5 T-states

So, minimum pulse width of the INTR signal to be recognized successfully = 17.5 x 0.33 x 10-6 = 5.8 μs long.

Q1.b  Explain how many time the following loop will be executed                                                 3

LXI B, 000Bh

Loop :             DCX B

JNZ Loop

Answer: LXI instruction loads the register pair BC with 000B which is 11. Inside the loop BC is first decremented i.e. now C=10, Because of the condition JNZ the loop executes 10 times.

Q1.c Write the program to generate a delay of 1 ms in 8086 microprocessor                              3

Solution:

assuming 8086 microprocessor operating at 5 MHZ

Total T states

 

in loop   21

Number of clock cycles for execution of the loop once (m) = 2 + 3 + 16 = 21

Time required for the execution of loop once = m X T = 21 X 1/(5 X 10^6) = 4.2 µs

Count            = td/(m X T)       =             1 X 10^-3 /(4.2 X 10^-6) = 238 = EEh

Program to give 1 ms delay

COUNT EQU EEh

MOV CL, Count 4                 T States

L1   :           DEC CX                                 2

NOP                                       3

JNZ         L1                           16

 

 

1.d Explain the usefulness of “TEST” and “LOCK” instruction in 8086 microprocessor.           3

Solution:

LOCK’ : Its an active low pin. It indicates that other system bus masters have not been allowed to gain control of the system bus while LOCK’ is active low(0). The LOCK signal will be active until the completion of the next instruction.

TEST’ : This examined by a ‘WAIT’ instruction. If the TEST pin goes low(0), execution will continue, else the processor remains in an idle state. The input is internally synchronized during each of the clock cycle on leading edge of the clock.

1.e Write the important features of 8251(USART) IC                                                                       3

Solution:

  1. It is a 28 pin DIP Chip
  2. It takes data serially from peripheral (outside devices) and converts into parallel data.and vice versa
  • It is a programmable chip with 16-bit control register with which it can be programmed
  1. Modem control unit to helps the computers to communicate over telephone lines or cable wires
  2. Transmit control unit to control the data transmission

1.f What are different operating modes of 8255 PPI                                                                        4

Solution:

  1. Bit Set/Reset (BSR) Mode: Used to set or rest the Port-C bits
  2. Input/Output (I/O) Mode: This mode is further of following types
    1. Mode-0: All the three ports PA,PB,PC act as simple 8-bit I/O ports
    2. Mode-1: 8255 in mode-1, permit port PA and PB in 8-bit port with handshake. The handshake signals being carried by port PC. PCupper controls the PA and PClower controls port PB.
    3. Mode-2: 8255 in mode-2 act as bidirection on Port PA with handshake signals on port PC and PB act as simple I/O port

1.g) What are different two-operand logical instructions used in 8051 microcontroller       3

Solution:

Logical ANL, ORL and XRL act as two-operand instructions in 8051. They support all addressing modes.

Syntax: OPCODE operand-1, Operand-2

Examples: The above syntax is valid for ANL, ORL and XRL. Sample example is given below

XRL A, #immd                                                                   ORL A, @Ri

ANL  A, Rn                                                                          XRL A, direct

1.h) Write main drawback of microprogrammed control                                                                       3

Solution:

  1. This is slower than the hardwired control unitbecause the microinstructions are to be fetched from the control memory which is time-consuming.
  2. Expensive for small designs

Unit-1

Q2.a)   if 8085 has fetched the machine code located at the memory location 205Fh, specify the content of the program counter.    5

Solution:

The PC is a 16-bit pointer regiser which points to the address of the next instruction while the current instruction is being fetched. So, when the current instruction at address 205F was being fetched the PC was pointing to 2060h.  But as per the question 8085 has fetched the instruction, so the 8085 is in the process of fetching the instruction at address 2060H and as a result of its nature, the PC will be pointing to 2061h

Content of PC is therefore= 2061h

 

 

Q2.b)   What are the different control signals and status signals in case of 8085 microprocessor? Explain the function of each one. 5

Solution: various control and status signal on 8085 microprocessor are: ALE, WR’, RD’, IO/M’, READY, RESET-IN’ ,S1, S0

ALE : It helps in demultiplexing the lower order address and data bus. This signal goes high during the first clock cycle and enables the lower order address bits. The lower order address bus is added to memory or any external latch

READY is used by the microprocessor to check whether a peripheral is ready to accept or transfer data. These peripherals are connected to microprocessor using the READY pin. If READY is high then the periphery is ready for data transfer. If not the microprocessor waits until READY goes high.

RESET-IN’ : This pin resets the program counter to 0 and resets interrupt enable and HLDA flip-flops. The CPU is held in reset condition until this pin is high.

 

IO/M’ S1 S0 Status
0 0 1 Memory Write
0 1 0 Memory read
1 1 0 IO read
1 0 1 IO Write
0 1 1 Opcode fetch

 

 

Q2.c) Can an input port and an output port have the same port address? Justify your answer.                           2.5

Solution :

Yes port can also act as a bidirectional port. A port can be connected to a memory unit. A memory has both theread and write operation. Therefore it is possible to make a port as input and output port. In microcontroller we have a provision of programming the port for the direction operation. When we write FF to a port the will become as an input port. Thus a port can act as an input as well as an output port but one operation at a time a read or a write to a port.

 

Q3.a) Write a program for 8085 microprocessor to add the following five data bytes stored in memory location starting from 2060h and display the sum. (The sum doesn’t generate any carry, Use register pair DE as a memory pointer to transfer a byte from memory into a register)   6.5

Data :  1A, 32, 4F, 12, 27

Solution: LDAX Rp instruction in 8085 is used to load accumulator from the address given in register pair, similarily STAX instruction stores the accumulator content in memory whose address is given in Rp.

MVI C, 4                      ; load the counter (N-1 = 4)

MVI B, 0                      ; initialize B

LXI D, 2060h              ; initialize DE as memory pointer

Again:         LDAX D                       ; read a number

ADD B                         ; add with B

MOV B, A                    ; save copy of partial result

INX D                          ; increment memory pointer

DCR C                         ; decrement count

JNZ again                    ; loop

INX D

MOV A, B

STAX D                       save the result at next location

Q3.b) What are the different kinds of maskable interrupts in 8085 microprocessors? Illustrate with the help of examples.     6

Solution :

8085 has following five types of interrupt : TRAP, INTR, RST7.5, RST6.5, RST5.5, of these TRAP is non-maskable and all others are maskable.

The maskable interrupt can be masked using the SIM instruction. It format is given below:

Set mask for RST 7.5, RST 6.5 and RST 5.5 as per the 8-bit content of the accumulator

To reset RST RST 7.5 flip flop i.e. if D4=1, RST 7.5 will be res

Example:

MVI A, 00011001                             Reset RST7.5, mask RST5.5

SIM

 

UNIT-II

Q4.a) Explain the register addressing mode and immediate addressing mode in 8086 microprocessor with the help of an example.       3

Solution:

Register addressing mode: this mode is used for register to register transfer. both the source and destination registers should be of the same size i.e. ax, bx, cx, dx,si,di or sp or bp for 16-bit and ah, al, bh, bl, ch, cl, dh, dl for 8-bit data.

examples: 

MOV  AL, BL                                                                       MOV CX, AX

Immediate addressing mode:in th in this mode the 8 or 16 bit data is part of the instruction. the assembler at assembly time inserts this value directly into the machine instruction. an immediate data can be a constant such as a number, character or an arithmetic expression.

Example: MOV AL, 56h                                  MOV AX, 12D5h

 

 

  1. b) What are the different classification of assembler directives based on the functions performed?                  4.5

Solution:

Type of Directive Purpose Mnemonic
Segment directives: these are used to define the beginning and end of the segments. SEGMENT

ENDS

Procedure directive To indicate the definition of the procedures PROC

ENDP

Data definition To define the data types DB

DW

DD

DT

EVEN directive

OFFSET directive

PUBLIC directive

 

EVEN : to align the word boundary to next even address for faster access

OFFSET : used where the offset from starting of the segment is required

used to instruct the assembler that a Specified name or label will be accessed from other modules

EVEN

OFFSET

PUBLIC

 

c) How many bytes of storage do the following EPROM memory device contains? (i) 2716 (ii) 2764                         3

Solution:

The EEPROM size for the IC 27XX, XX indicate number of killo bits of addressable memory.

EEPROM IC Size in Bits Size in Bytes
2716 16Kbits (Kb) 2K Killo Byte (KB)
2764 64Kbits (Kb) 8K Killo byte (KB)

 

d) Why do the interrupts free up the time for the microprocessors? 2

Solution:

Interrupt are a good mechanism of IO interfacing. In interrupt, the device notices the CPU that it requires its attention. On receipt of such notification, an ISR will be called for servicing the request of the device. All the other times, the microprocessor can perform very critical tasks.

 

Q5.a) What are the different conditional transfer instructions in 8086?                                               7

Solutions: Various conditional transfer instructions are discussed below

Instructions Description
JA/JNBE label Jump if above /jump if not below nor equal
JAE/JNB label Jump if above or equal /jump if not below
JB/JNAE label Jump if below/jump if not above nor equal
JC label Jump on carry
JE /JZ label Jump if equal/jump if zero flag is set
JNC label Jump if no carry
JNE/JNZ label Jump if not equal/jump if zero (ZF is not set)
JO label Jump if overflow (OF is set)
JNO label Jump if no overflow (OF =0)
JP/JPE label Jump if PF = 1/jump if parity if is even
JNP /JPO label Jump if not parity PF = 0/jump if parity if is odd
JG/JNLE label Jump if greater/jump id
JA /JNL label Jump if above / jump if not less than
JL/JNGE label Jump if less than /jump if not greater nor equal
JLE/JNG label Jump if less than and equal to / jump if not greater
JS label Jump if -ve (SF = 1)
JNS label Jump if not -ve (SF=0)

 

  1. b) Write the 8086 assembly language program to generate the Fibonacci series using a recursive algorithm.      5

Solution:

org 100h

.MODEL SMALL

.DATA

NUM_1  DB ?

NUM_2  DB ?

NUM_3  DB ?

V1     DB ?

V2     DB  ?

NL     DB  ‘  ‘, 0DH,0AH,’$’

.CODE

start:

MOV AX,@DATA

MOV DX,AX

MOV CX,10

MOV CH,0

MOV NUM_1,0

MOV NUM_2,1

MOV DL,NUM_1

OR  DL,30H

MOV AH,02H

INT  21H

MOV DL,NUM_2

OR DL,30H

MOV AH,02H

INT 21H

MOV AL, NUM_1

CALL fibo

MOV AX,4C00H

INT 21H

fibo proc near

ADD AL,NUM_2

MOV AH,0

MOV BL,AL

MOV DL,10

DIV DL

ADD AX,3030H

MOV V1,AL

MOV V2,AH

MOV DL,V1

MOV AH,02H

INT 21H

MOV DL,V2

MOV AH,02H

INT 21H

SHIFT:

MOV AL,NUM_2

MOV NUM_1,AL

MOV NUM_2,BL

DEC CL

JZ exit

MOV AL,NUM_1

callFibo: call fibo                         ; recrussive call to fibo procedure

exit:   RET

fibo ENDP

END start

 

Q6.a)   How will you interface a pushbutton keyboard and a seven segment LED display using a programmable peripheral interface (PPI). Illustrate with an example.                                      6

Solution:

Keypad is connected to ROW and column lines are connected to 4-bits of Port PA and PB, KB is connected in simple I/0 mode-0 and 7-segment display is connected to the Port PC. OPC is configured as output in Mode-0 simple i/o. The control word and complete figure is shown below:

Control word:

D7 D6 D5 D4 D3 D2 D1 D0
BSR / IO MODE SELECT PA I/O PCU I/O MODE SELECT PORT B PORT B I/O PCL I/O
1 0 0 1 0 0 1 0

 

  1. b) Specify the conditions to start the timer 8254. 5

Solution:

The normal procedure for software control of 8254 are:

  1. Find or note the 8254 address of counter(s) and the control word register
  2. Write the control word into the control register of 8254 for each counter user
  • Write the initial count value into the counter register
  1. Apply the clock pulse to the counter
  2. Check for the desired count values, the interrupt signal from the counter, or check for the hardware signal out of the counter. After checking the required time delay, execute the next operation
  3. c) Set up 8254 as a square wave generator with a 1ms period if the frequency to 8254 is equal to 1MHz                                                                                                                         4

Solution:

Pulsewidth of 8254 = 1/1M = 1 microseconds

Pulse width of square wave = 1 ms;

Count =           1 ms / 1us                 = 1000  = 3E8h

Calculation of CWR

Assuming : Address of peripheral(8254) is : 82hCounter-1, Mode-3; control word address 86h

D7 D6 D5 D4 D3 D2 D1 D0
SC1 SC0 RL1 RL0 M2 M1 M0 Binary/BCD
0 1 1 1 0 1 1 1
Counter-1 Load LSB and Then MSB Mode-3 Square wave generator BCD count

Code SEGMENT

ASSUME CS: Code

MOV AL, 77h              ; load control word

OUT     86h, AL

Back : MOV    AL, E8h           ; load lower byte of count

OUT     82h, AL

MOV    AL, 03h           ; load upper byte of count

OUT     82h, al

HLT

Code ENDS

END

Updated: December 18, 2020 — 1:29 pm

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