8051 Timers 8051 Micro-controller by Ravinder Nath Rajotiya - December 3, 20210 Timers in 8051 There are two timer in 8051, Timer-0, Timer-1;--- Use of timers: To produce precise delay timing Counting the events Generating baud rate Registers associated with timer operation are: TMOD 89h TCON 88h TH0 8Ch TL0 8Ah TH1 8Dh TL1 8Bh Format of TMOD and TCON registers TMOD SFR (89h) Timer-1 Timer-0 D7 D6 D5 D4 D3 D2 D1 D0 Gate C’/T M1 M0 Gate C’/T M1 M0 1: COUNT only if INT1 (P3.3) input pin is high 0-count regardless of INT1 1- Count pulses on pin T1(P3.5) 0- Count every machine cycle 00 Mode-0; 13 bit timer 01- Timer 16 bit 10 mode-2; 8-bit auto reload 11- Split timer mode 1: COUNT only if INT0 (P3.3) input pin is high 0-count regardless of INT0 1 Count pulses on pin T1(P3.5) Count eevery machine cycle 00 Mode-0; 13 bit timer 01- Timer 16 bit 10 mode-2; 8-bit auto reload 11- Split timer mode Timer Control SFR Timer Control TCON SFR (88h) Bits D7 D6 D5 D4 D3 D2 D1 D0 Bit Address 8F 8E 8D 8C 8B 8A 89 88 Bit Name TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 Description Timer-1
Timer Programming in 8051 8051 Expriments by Ravinder Nath Rajotiya - December 4, 2020May 27, 20210 Programming 8051 Timers Registers used for normal operation (No interrupts) TMOD, TH1,TL1, TH0, TL0, and TCON TMOD to set the Mode Timer Register to set the count TCON to start and stop the timer Registers used for Interrupt operation IE, TMOD, TH1,TL1, TH0, TL0, and TCON TMOD to set the Mode Timer-0 and Timer-1 Register to set the count TCON to start and stop the timer Register Formats: Interrupt Enable (IE) Register IE.7 IE.6 IE.5 IE.4 IE.3 IE.2 IE.1 IE.0 EA ET2 ES ET1 EX1 ET0 EX0 =0, disable =1 enable -- Enable/disable serial port interrupt Enable/disable timer-1 Ov interrupt Enable/disable external interrupt-1 Enable/disable timer-0 Ov interrupt Enable/disable external interrupt-0 TMOD Register: Timer-1 Timer-0 GATE C/T’ M1 M0 GATE C/T’ M1 M0 =1; The timer/counter enabled while INTx and TRx bit is set =0, timer enabled whenever TRx bit is set 1 = Counter 0=Timer 00=13 bit timer mode (8-bit timer/counter with TLx as 5-bit prescalar 01=16 bit timer mode, THx and TLx cascaded,