De-Multiplexing the Address and Data bus 8085 8085 Microprocessor by Ravinder Nath Rajotiya - February 22, 2022February 23, 20220 Share on Facebook Share Send email Mail Print Print Introduction 8085 is an 8-bit microprocessor an address a maximum of 216 = 65536 memory location. It has a total of 16-pin on the package which will be used to carry both the address as well as the data. The low order address lines are multiplexed with 8-data lines and hence the pin 11 to 19 on the 8085 microprocessor IC are numbered as AD7 – AD0 (pin 12-19), whereas the high order bus is marked as A15 – A8 (pin 21-28) as shown in following cut-section diagram. For accessing the memory full 16-bit address value must appear at once on pins A15 – A0 but the lower byte is not exclusively available to carry the address, it also carries the data. It is therefore required to de-multiplex the lower byte for address and data. An external latch can be used for this purpose Figure-2 shows the interfacing of memory with 8085 with the help of a latch. ALE signal is connected to the chip enable of the latch. 8085 Microprocessor has a special pin-30 marked ALE (Address Latch Enable). A high signal on this pin is used to enable a latch. Thus the content on AD7-AD0 (address) is latched at the output of the latch. The output of latch thus represent only address lines A7-A0. When ALE goes low, same pins can now be used to carry the data to/from the memory. Figure-3 shows the timing flow for demultiplexing the address and data bus. The 16-bit address generated by the Microprocessor is placed as High byte (A15 – A8) on pin 21-28 and low order address on pin 12-19. During timing cycle T0, microprocessor generates a short Low-to-High pulse on the ALE pin number 30, thus enabling the latch whose inputs are connected on AD7-AD0 (PIN 12 to 19 of 8085) Address now get latched on the output of the latch as A7-A0. After a while the ALE signal goes LOW and the address remains on the output side of the latch. During timing cycle T1, the AD7 – D0 pins act as the data bus and can be used to carry the data (D7 – D0) to/from the memory. Share on Facebook Share Send email Mail Print Print