Arithmetic Instruction (8086) 8086 Microprocessor by Ravinder Nath Rajotiya - October 15, 2020October 23, 20200 Share on Facebook Share Send email Mail Print Print Arithmetic Instructions The instruction in this group include ADD, ADC, INC, AAA, DAA, SUB, SBB, DEC, NEG, CMP, AAS, DAS, MUL, IMUL, AAM, DIV, IDIV, AAD, CBW, BWD. These instruction require two operands which act as destination and the source. Almost all the instructions affect the flags. Instruction Format Flags affected Description Processing ADD ADD Dst, Src AF, CF, OF, PF, SF,ZF Add Dst and Src with result in Dst Dst = Dst+Src ADC ADC Dst, Src AF, CF, OF, PF, SF,ZF Add Dst and Src and the carry with result in Dst Dst = Dst+Src + Cy AAA AAA Affects AF and CF all others PF, ZF, SF, OF are unaffected This instruction follows the addition of unpacked BCD operands. Adjust ASCII addition result, result in AX. The result in AL is changed to unpacked BCD, AL(7-4) cleared, CF is set, AH incremented if there was a carry DAA DAA AF, CF, PF and ZF, OF are undefined Adjust the result of BCD decimal addition ADD AL, BL DAA Add 6 to a nibble result to AL if that nibble >9 SUB SUB Dst, Src AF, CF, OF, PF, SF,ZF Performs decimal subtraction Dst= Src-Dst SBB SBB Dst, Src AF, CF, OF, PF, SF,ZF Performs subtraction with a borrow Dst= Src-Dst – Cy AAS AAS Affects AF and CF all others PF, ZF, SF, OF are unaffected This instruction follows the subtraction of unpacked BCD operands Adjusts the ASCII subtraction result The result in AL is changed to unpacked BCD, AL(7-4) cleared, CF is set, AH decremented if borrow occured DAS DAS AF, CF, PF and ZF, OF are undefined Adjusts the BCD subtraction result With the result in AL. If lower nibble in AL>9 or AF==1, DAS subtracts 6 from lower nibble. If now upper nibble in AL >9 or Cy is set, it subtracts 60 from AL MUL MUL reg/Mem If the upper byte of word or upper word of 32-bit is zero CF, OF will be ‘0’ And AF,PF, SF,ZF are undefined Multiplies AL/AX and reg/Mem Used for unsigned multiplication MUL BL (AX=AL*BL) MUL CX DX:AX=AX*CX IMUL IMUL reg/mem If the upper byte of word or upper word of 32-bit is zero CF, OF will be ‘0’ else CF, OF will be ‘1’ And AF,PF, SF,ZF are undefined Used for signed multiplication Src in AL or AX IMUL CL ie (AL*CL) IMUL byte ptr [SI] Result is AX or DX:AX If quotient doesn’t require all bits of Dst(AX or DX:AX) all unused bits are copied with sign bit AAM AAM PF, SF,ZF, but AF, CF, OF are unaffected No argument required MUL CL AAM (unpacked BCD) OR AX, 3030h ; to get ASCII code in AX DIV DIV reg/mem All flags undefined Used to divide unsigned data. AAD to be used before DIV for unpacked BCD DIV reg/mem For 8-bit result AX=dividend AL=quotient AH=remainder For 16-bit DX:AX=dividend AX=quotient DX=remainder IDIV IDIV reg/mem All flags undefined To divide signed byte by another signed byte dividend is put in AL and then sign extended using CBW. For signed division of words the dividend sign is extended using CWD AL= signed dividend CBW IDIV div OR use AX=signed word CWD IDIV word AAD AAD PF, SF,ZF, but AF, CF, OF are unaffected Converts unpacked BCD to packed decimal. This instruction ASCII adjust before division to prepare for the division of two valid unpacked BCD operand. For example AH=33 AL=32 AAD DIV CL After AAD; divisor AX=0020h binary equivalent of decimal 32 CMP CMP dst, src AF, CF, OF, PF, SF,ZF Compares Src with dst by subtraction. Rules of subtraction applies. CMP AX, DX Process CF ZF SF AX=DX 0 1 0 AX>DX 0 0 0 AX<DX 1 0 1 INC INC reg/mem AF, OF, PF, SF,ZF; CF is not affected Increments byte or word or memory location/content INC CL INC AX INC SI INC byte ptr [BX] INC word ptr [SI] DEC DEC reg/mem AF, OF, PF, SF,ZF; CF is not affected Increments byte or word or memory location/content DEC CL DEC AX DEC SI DEC byte ptr [BX] DEC word ptr [SI] NEG NEG reg/mem All flags AF, CF, OF, PF, SF,ZF Performs 2’s complement and store it in the same place NEG AL, takes 2’s complement of AL and stores the result back in AL NEG CL NEG AX NEG SI NEG byte ptr [BX] NEG word ptr [SI] CBW CBW No flags affected Convert signed byte to signed Word (extends sign bit to AH) AX <- AL sign extended CWD CWD No flags affected Convert signed Word to signed Double word DX:AX <- AX sign extended It is expected that the reader is familiar with the binary arithmetic. The BCD and ASCII arithmetic need special mention here. ASCII Add/Sub The tabke below shows the ASCII value for the decimal digit. Decimal digit ASCII Representation Equivalent Hex value 0 ‘0’ 30 1 ‘1’ 31 2 ‘2’ 32 3 ‘3’ 33 4 ‘4’ 34 5 ‘5’ 35 6 ‘6’ 36 7 ‘7’ 37 8 ‘8’ 38 9 ‘9’ 39 The microprocessor process the binary numbers, when we press any digit keys 9 through 0 their ASCII value actually enters the system i.e. code 39 (‘9’) through 30 (‘0’). If you enter 45 from key board the key code enter the system as 34 and 35. The operations on these numbers would yield incorrect result unless the result is adjusted to correct value. The following table gives the problem on arithmetic problems on ASCII numbers and the algorithm to correct the problem. Decimal numbers ASCII (hex) inputted from keyboard 1st number 34 2nd number 56 1st number 33 34 2nd number 35 36 Addition on Decimals Addition on ASCII 1st number 34 2nd number 56 —————————- Sum 90 1st number 33 34 2nd number 35 36 ——————————- Sum 68 6A Clearly there seem to be some problem. Problem is not with the system, but in our interpretation. For the physical world representation of these ASCII numbers and their representation we need to do some adjustment after ASCII arithmetic. AAA (ASCII Adjust for Addition) Case-1: AL(bit 3-0) <= 9 and AF==0 Case-2: AL(bit 3-0) > 9 and AF==0 Case-3: AL(bit 3-0) > 9 or AF==1 IF AL(3-0) <= 9 Then do CF = 0 CF = 0 AL= AL and 0F END if AL(bit 3-0) > 9 then do AL = AL and 0F AL = AL – 10 AH = AH + 1 CF = 1AF = 1 ELSE CF = 0 AF = 0AL= AL and 0FEND if AL(bit 3-0) > 9 OR AF = 1 THEN AL = AL + 6 AH = AH + 1 AL = AL and 0FAF =1CF = 1 ELSE AF = 0CF = 0 AL = AL and 0F END Examples of ASCII Addition: Example-1: No carry (AF=0) and AL(3-0) <= 9 Example-1: No carry (AF=0) But 1st Nibble > 9 Example-1: carry (AF=1) or 1st Nibble > 9 AL=’5′ = 35h = 00110101 BL=’4’= 34h = 00110100 AL=AL+BL=01101001=69h the result require ASCII adjustment Here AL(3-0) ==9 so Do CF<- 0; AF <- 0; clear AL(7-4) i.e AL= 00001001 = 9 which is correct result ASCII addition The aaa instruction performs these adjustments to the byte in AL register AL=’6′ = 36h = 00110110 BL =’4’= 34h = 00110100 AL=AL+BL= 01101010=6Ah which is incorrect result so we use ALGO-2 to correct the result. Here AL(3-0) > 9 THEN do clear top nibble of AL AL <– AL – 10 AH <– AH + 1 CF <– 1 AF <- 1 i.e. AL = 00001010 AL-10= 00001010 AL=AL-10= 00000000 and set AH=AH+1=00000001 And CF<– 1 and AF<– 1 So the correct unpacked result is in AH and AL = 10h ‘9’= 39h = 00111001 ‘8’= 38h = 00111000 ‘9’+’8′ = 01110001 = 71h (AF=1)which is incorrect and require ASCII adjustment after addition as follows: IF AL(3-0) –> 9 OR AF = 1 THEN AL <– AL + 6 (01+06 =07) AH <– AH + 1 Bits 4-7 of AL set to 0 AF and CF set END AL = 01110001+0110=01110111 AH <– 1; AL((7-4) =0000 AF<– 1; CF <- 1so correct result in AH and AL= 00000001 00000111 = 17 which is correct result. ASCII subtraction 1. If the ascii subtraction results in a positive number < 9 then ASCII simply clears the upper four bits in AL to give correct unpacked result. 2. If the ascii subtraction results in a negative number then we need to adjust it by using AAS instruction. The AAS instruction works as follows: If the least significant four bits in AL are > 9 or if AF =1 THEN subtracts 6 from AL and 1 from AH. And set CF and AF i.e. CF <- 1; and AF <- 1 In all cases, the most significant four bits in AL are cleared This adjustment is needed only if the result is negative AAS example for ASCII adjust Example 1: Positive result AL =’9′; AL = 39H = 00111001 BL = ‘3’ ; BL = 33H = 00110011 AL = 39H – 33H = 6H = 00000110 AAS gives; AX = 0006H OR AL,30H; AL = 36H i.e.gives ascii no. Example 2: Negative result AL =’3′ ; AL = 33H = 00110011 BL = ‘9’; BL = 39H = 00111001 AL = 33H-39H= 11111010=FAH AAS clears the four Most significant 4 bits and subtracts 6 from least significant 4 bits producing and 1 from AH : AX =AX – 0106 = 00000000 00001010 – 00000001 00000110 ————————————— =11111111 00000100 AX = FF04H OR AL,30H; Now AL = 34H; gives ascii BDC Addition and Subtraction: BCD addition and subtraction is as easy as binary addition and subtraction with the exception that is BCD addition if result nibble >9 or there is aux. carry, 6 is addd to the nibble to correct the answer. BCD Addition Note that the leftmost digit is a “sign digit.” If it is >= 5, the result is negative BCD Subtraction If low nibble of AL–> 9 or AF=1 then: AL=AL–6; – AF = 1 if AL–> 9Fh or CF = 1 then: AL = AL-60h; – CF = 1 AL = 68 =01101000 BL = 37 =00110111 AL+BL = 10011111 =9F; incorrect BCD ans. Add 6 01100110; correction done by DAA Aux.Carry &nsbp;1 = 1 00000101= 105 which is correct BCD result Example-1: Solve 68 – 37 AL= 68h = 01101000;BL=37h=00110111 AL-BL=&nsbp;00110001 = 31h DAS;leave the packed byte 31h in AL as is. Example-2: Solve 37-68 AL=37 = 00110111; BL=68 = 01101000 AL-BL= 11001111 = CFh which is wrong DAS used to correct the result Al > 9 so AL-6 = 11001111-00000110=c9h Now AL > 9F; so AL =AL- 60 AL= 11001001- 01100000 =01101001=69h with CF<- 1 Assembly programming Examples: Assume that two one word (16-bits) numbers are stored in memory address 2000 and 2002 in data segment, add the two numbers and store the result at the next address in the same segment. MOV AX, 2500 MOV DS, AX MOV AX, [SI] ADD AX, [SI+2] MOV [SI+4], AX JC NEXT MOV [SI+6], 00h JMP final NEXT: MOV [SI+6], 01h final : HLT Example-2: Example-2: Write an ALP for 8086 processor to to add two BCD numbers 97 and 69 and stored the result in BCD form back in memory Using assemble such as MASM Using KIT Source variable X Destination variable : Y Assume source packed data at location : 2500:1000 Converted Binary to be stored at 2500: 1001,1002 Data SEGMENT X db 97h, 69h Y db 2 dup(?) Data ENDS Code SEGMENT ASSUME CS: code, DS: data MOV ax, data MOV ds, ax MOV SI, offset X MOV DI, offset Y MOV AL, [SI] ADD AL, [SI+1] DAA MOV [DI], AL JC carry MOV [DI+1], 00h JMP stop Carry: MOV [DI+1], 01h Stop: MOV AH, 4Ch INT 21h Code ENDS END MOV AL, 97h ADD AL, 69h DAA MOV BX, 2500 MOV DS, BX MOV 1001h, AL JC carry MOV [1001], 00h JMP stop Carry : MOV [1001], 01h Stop: HLT Share on Facebook Share Send email Mail Print Print