8085 Classification of Instructions 8085 Microprocessor by Ravinder Nath Rajotiya - September 1, 2020May 10, 20210 Share on Facebook Share Send email Mail Print Print Table of Contents Toggle Classification of Instruction Set of 8085:Instructions Based on Size :Instructions Based on the functions: Based on the functions Instructions can be classified as :Classification based on Addressing Mode:Instructions Supporting Immediate mode addressing:Instructions Supporting Implied Mode addressingInstructions Supporting Direct Register ModeInstructions Supporting Direct Addressing modeInstructions Supporting Indirect Addressing Mode Classification of Instruction Set of 8085: 8085 Instructions can be classified based on the addressing mode used, size they occupy in memory or by the functions they perform. Figure-1 shows the classification of the instructions Figure-1: Classification of Instruction Set of 8085: Instructions Based on Size : These instructions can be classified are as follows: One byte Instructions: These instructions are of one byte in size and hence occupy one memory location in RAM. Examples are CMA, RLC, RRC, RAL, RAR, STC, CMC etc. These instructions do not require any operand to be specified with the instructions, instead the operand is implied in the instructions. Two Byte Instruction: These instructions of two byte(16-bits) in size and hence will occupy two memory locations in RAM. Examples of such instructions are MVI C,0A; Three Byte Instructions: These are of three byte in size and hence occupy three locations in memory(RAM). Examples of such instructions are CALL, JMP etc. Instructions Based on the functions: Based on the functions Instructions can be classified as : Classification based on Addressing Mode: Instructions Supporting Immediate mode addressing: MVI, SUI, ACI, SBI, ANI, XRI, ORI, CPI, LXI Instructions Supporting Implied Mode addressing CMA (Complement the Accumulator) RAL (Rotate Accumulator left through carry) RAR (Rotate accumulator right through carry) XCHG (Exchange the content of H-L register pair with D-E register pair) RLC (Rotate Left) RRC (Rotate Right) CMC (Complement Carry) STC (Set Carry) RIM (Read Interrupt Mask) SIM (Set Interrupt mask) Instructions Supporting Direct Register Mode MOV Rd, Rs Instructions Supporting Direct Addressing mode LHLD Addr LDA Addr STA Addr SHLD Addr Instructions Supporting Indirect Addressing Mode LDAX [Rp] ; Will load accumulator with data from address given in register pair Rp(BC, DE, HL) STAX [Rp] ; Will store data given in accumulator in memory at address given in register pair Rp. MOV A, M MOV M, A Share on Facebook Share Send email Mail Print Print