Access and File types in VHDL Digital Design using VHDL by Ravinder Nath Rajotiya - May 13, 2021May 14, 20210 Access Type: Access type allows to manipulate data, which are created dynamically during simulation and which exact size is not known in advance. Any reference to them is performed via allocators, which work in a similar way as pointers in programming languages. Simplified Syntax access subtype_indication type identifier; Here, the subtype_indication denotes the type of an object designated by a value of an access type. It can be any scalar, composite or other access type. File type is not allowed here. Variables are only the objects allowed to be of the access type. The default value of an access type is null. NULL designates no object at all. Allocators has to be used to assign any other value to an object of an access type. The access type allows to create recursive data structures
Data Types in VHDL Digital Design using VHDL by Ravinder Nath Rajotiya - May 10, 20210 Data Types in VHDL The syntax of object declaration as studied in the previous chapter is again revisited. Object_class Object_name : Object_data_type[:= Initial_value]; The essential component of the above declaration is object class and data type. Whereas the class signifies the class/category (signal, variable, constant, file) to which the object belongs, the data type gives an idea of the type (bit, Boolean, std_logic, integer etc.) -of the values an object may take and the value from a set of the values that an object may be assigned. Every given data type supports some specific operations for the object for example data type bit supports logical and arithmetic operations but std_logic (as given in std-logic_1164) does not support arithmetic operation. If arithmetic operation on std_logic