Table of Contents

8051 Internal Architecture

8051 microcontroller was developed by Intel in 1980s. It is an 8-bit controller and is based on Harvard Architecture which uses two separate memory for storing program and data. The internal architecture describes the organization of the internal components of 8051. Figure 5.1 shows the internal architecture of 8051.

Internal components of 8051

Internal Memory: 8051 has two separate memory blocks these are program memory (ROM) and data memory (RAM).

Data Memory

RAM is used as data memory. 8051 has 256 byte of direct addressable memory and 128 byte indirect addressable memory. 256 Byte RAM includes four register banks named bank 3 through bank 0. Each bank contains 8-register each of 8-bits. they are name R7 through R0. It also include 16 byte bit/byte addressable memory from location 20h to 2Fh and the scracth pad memory. of the upper 128 byte, only 21 locations are used as SFR which can be accessed by their name or address.

It also has separate 128 byte indirect addressable memory.

Register Bank

The lower 32 bytes are used as four banks of eight registers. The register banks can be selected by setting or clearing bits RS1 and RS0 of the PSW. They are shown in figure 5.2.

Special Function Registers (SFR):

8051 uses the upper 128 byte of data memory (RAM) as special function registers. Only 21 locations are used as SFR. The SFR of 8051 are:

P0, P1, P2, P3,
SP, DPH, DPL,
TCON, PCON, TMOD,
TL0, TL1, TH0, TH1,
SCON, SBUF,
IE, IP,
PSW, A, B
Program Memory (ROM)

8051 has 4KByte of internal program memory (ROM), An optional 64 KByte ROM can be externally interfaced with 8051.

Accumulator and register B

Both register A and B are 8-bit registers. Instructions involving two operands uses register A as accumulator and register B as temporary register. Accumulator holds one of the operand and also stores the partial result. For reading from external ROM, data is first read in accumulator register.

Program Counter(PC) :

It is a 16-bit register which holds the address of program memory. It always points to the address of the next instruction to be fetch.

Data Pointer (DPTR)

There is in fact no register named DPTR, It refers to two 8-bit registers DPH and DPL. together as 16-bit, DPH | DPL is known as DPTR. It hols the 16-bit address of the data memory. For reading from the RAM, DPTR (DPH+DPL) is assigned 16-bit address value.

PORTS

8051 has four 8-bit ports. They can accessed as 8-bit ports for reading or writing bytes of information. Each pin of these ports can also be accessed as Px.y meaning (port x pin y). They can be used as simple input output ports or can also be used for addition function by selecting the function appropriately.

Bus: Bus in controllers is a collection of 8 or 16 wires which work as a communication channel or medium for transfer of Data. Thus these can carry 8 bits, 16 bits simultaneously. Buses are of two types:

Address Bus
Data Bus

Address Bus: Microcontroller 8051 has a 16 bit address bus. It used to address memory locations. It is used to transfer the address from CPU to Memory.

Data Bus: Microcontroller 8051 has 8 bits data bus. It is used to carry data.

Program Status Word (PSW)

This is also a 8-bit register. This register is used to indicate the status of an arithmetic operation. Figure 5.3 shows the 8051 PSW.

Carry Flag: It indicate that a carry or borrow has occurred as a result of arithmetic addition or subtraction. Set for a carry/borrow, cleared otherwise.

Auxiliary Carry Flag:

This flag is set whenever a carry occur as a result of addition or subtraction of lower nibble of two numbers.

F0 Flag: This flag was not available in initial version of 8051. This is a user defined flag, user can use this flag for different purpose.

These two register are used to select a register bank before any of the register R7-R0 can be used. These two bits are also use to check which register bank is curretly in use.

RS1	RS0	Register Bank
0	0	Bank-0
0	1	Bank-1
1	0	Bank-2
1	1	Bank-3

Overflow Flag (OV): This flag is set whenever the result of an operation exceeds the capacity of the register. For example, OV will be set, if addition of two positive numbers result in a negative result or vice versa.

Parity Flag:

This flag is used to indicate the staus of the parity. This flag is set when the number of 1’s in the result is odd. For even number of 1’s in result, this flag is cleared.