Table of Contents

Date Transfer Instructions

Used to move a source data to destination

MOV Instruction

Instruction/Addressing	Opcode	Subsequent Byte	Example and Operation	Flags Affected
MOV Rn, #immediate	01111nnn		MOV R4, #5h	None
MOV A, #Immediate	01110100	Immediate	MOV A, #0FFh	P
MOV @Rn, #immediate	0111011n	Immediate	MOV @R0, #05h	None
MOV direct, #immediate	01110101	Direct, Immediate	MOV P2, #0FFh	None
MOV Rn, A	11111nnn		MOV R5, A	None
MOV A, Rn	11101nnn	–	MOV A, R6	P
MOV @Ri, A	1111011i	—	MOV @R0, A	None
MOV A, @Ri	1110011i	—	MOV A, @Ri	P
MOV dest_direct, src_direct	10000101	Src_Address, dest_Addr	MOV P1, P0	None
MOV direct, @Rn	1000011n	direct	MOV P0, @R1	None
MOV @Ri, Direct	1010011i	direct	MOV @Ri, P2	None
MOV direct, A	11110101	direct	MOV P0, A	None
MOV A, Direct	11100101	direct	MOV A, P0	P
MOV direct, Rn	10001nnn	direct	MOV P2, R5	None
MOV DPTR, #immediate	10010000	immediate_15-0	MOV DPTR, #1234h	None
MOV Rn, direct	10101nnn	Direct	MOV R4, P1	None
MOV C, bit	10100010	bit	MOV C, 22h	None
MOV bit, C	10010010	C	MOV, 22, C	None

MOVC

This instruction is used to move a byte from the code or program memory to the accumulator.

Syntax : MOVC A, @A + PC

MOVC A, @A+DPTR

MOVC A, @A+DPTR	10010011	—	MOVC A, @A+DPTR A=(A+DPTR)	P
MOVC A, @A+PC	10000011	—	MOVC A, @A+PC; PC A=(A+PC)	P

MOVX

The MOVX instruction transfers data between the accumulator and external data memory. External memory may be addressed via 16-bits in the DPTR register or via 8-bits in the R0 or R1 registers. When using 8-bit addressing, Port 2 must contain the high-order byte of the address.

MOVX @Ri, A	1111001i	—	MOVX @Ri, A (Ri) = A	None
MOVC A, @DPTR	11100000	—	MOVX A, @Ri A = (DPTR)	P
MOVX A, @Ri	1110001i	—	MOVX A, @Ri A= (Ri)	P

Swap and Exchange Instructions

SWAP

The SWAP instruction exchanges the low-order and high-order nibbles within the accumulator. No flags are affected by this instruction.

format	Opcode/Encoding	Subsequent byte	Example	Flags Affected
SWAP A	11000100	—	SWAP A A3-0 swap A7-4	None

XCH:

The XCH instruction loads the accumulator with the byte value of the specified operand while simultaneously storing the previous contents of the accumulator in the specified operand.

format	Opcode/Encoding	Subsequent Byte	Operation
XCH A, @Ri	1100011i		XCH A, @R0 A swap (Ri)	P
XCH A, direct	11000101	direct	XCH A, 45h A swap (direct)	P
XCH A, Rn	11001nnn		XCH A, R6 A swap Rn	P

XCHD

The XCHD instruction exchanges the low-order nibble of the accumulator with the low-order nibble of the specified internal RAM location. The internal RAM is accessed indirectly through R0 or R1. The high-order nibbles of each operand are not affected.

Format	Opcode/ Encoding	Subsequent Byte	Operation	Flags Affected
XCHD A, @Ri	1101011i	—	XCHD A,@R1 A3-0 swap (Ri)3-0	None

Stack Related Instructions

PUSH

The PUSH instruction increments the stack pointer and stores the value of the specified byte operand at the internal RAM address indirectly referenced by the stack pointer. No flags are affected by this instruction.

Format	Opcode/Encoding	Subsequent Byte	example	Flags Affected
PUSH direct	11000000	8-bit direct addr	PUSH A SP=SP+1 (SP)=(direct)	None

Program to show use of PUSH Instruction (By default SP=07h)

MOV R1, #35h ; R1= 35h

MOV R2, 35h ; R2=(35h)

MOV R3, #45h ; R3= 45h

PUSH R1 ; Increment SP(Now SP=08h), Save R1 at stack location (08h)=R1

PUSH R2 ;increment SP(Now SP= 09h), Save R1 at stack location (09h)=R2

PUSH R3 ;increment SP(Now SP= 0Ah), Save R1 at stack location (0Ah)=R3

POP

The POP instruction reads a byte from the address indirectly referenced by the SP register. The value read is stored at the specified address and the stack pointer is decremented. No flags are affected by this instruction.

Format	Opcode/Encoding	Subsequent Byte	Operation	Flags Affected
POP direct	11010000	direct 8-bit addr	POP 34h (direct)=(SP) SP=SP-1	None

Program to show the use of POP instruction

Assume the stack memory has the following contents

(08h)=15h; (09h)=05h; (0Ah)=25h; (0Bh)=02h

Explain the operation on executing the following instructions

POP 5

POP2

POP4

Solution

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0Bh 02 0Bh 0Bh 0Bh 0Bh

0Ah 25h 0Ah 25h 0Ah 0Ah 0Ah

09h 05h 09h 05h 09h 05h 09h 09h

08h 15h 08h 15h 08h 15h 08h 15h 08h

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SP=0Bh SP=0Ah SP=09h SP=08h SP=07(Empty)

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8051 Data Transfer Instructions