Instruction Types Computer Organization and Architecture by Ravinder Nath Rajotiya - May 17, 2021December 11, 20220 Share on Facebook Share Send email Mail Print Print Table of Contents Toggle Computer Instructions:Format of the instructionType of InstructionsMemory Reference InstructionsDirect Register Reference InstructionsInput-Output InstructionsInstruction Set Completeness Computer Instructions: A digital system such as a processor or CPU accepts binary data as input, processes that data, and then provides output based on the instructions stored in the memory. The processor has an ALU to process the data, registers for temporary data transfer and the control unit manages the flow of instructions and data through the system. It requires the user to store the program (set of instructions) in memory. Format of the instruction When the execute command is given, the instruction from the memory is read into the instruction register (IR). The instruction is basically divided in two parts, the instruction code and the address part of the instruction. Format of the instruction is given below: Instruction Code Address part of instruction Mode bit (bit 15) OpCode Bits(14 – 12) Bits(11———————– 0) Instruction Types: The three OpCode bits (14 – 12) are passed to the instruction decoder to give 8 decoded opcodes (D7 – D0). The Decoded output D7 along with the M-bit identifies the type of the instruction. Figure below illustrates the type of instructions. Figure- Instruction Types Type of Instructions Memory Reference Instruction. Direct memory-reference instruction Indirect Memory-Reference Instructions Register-Reference Instructions Input-Output reference Instructions Memory Reference Instructions The M-bit i,e, the MSB of the instruction format differentiated between the direct memory-reference and the indirect memory-reference instructions. Table below shows the two types along with the decoder output code, mnemonic code and the Hex format of the these type of instructions. Direct Memory Instructions InDirect Memory Instructions Mode Bit15 (M) OpCode Bits(14 – 12) Decoder output Mnemonic Code 16-Bit Format Hex Mode Bit15 (M) OpCode Bits(14 – 12) Decoder output Mnemonic Code 16-Bit Format Hex Address 0 0 0 0 0 0 0 000 001 010 011 100 101 110 D0 D1 D2 D3 D4 D5 D6 AND ADD LDA STA BUN BSA ISZ 0XXX 1XXX 2XXX 3XXX 4XXX 5XXX 6XXX 1 1 1 1 1 1 1 000 001 010 011 100 101 110 AND ADD LDA STA BUN BSA ISZ D8 D9 DA DB DC DD DE 8XXX 9xxx Axxx Bxxx Cxxx Dxxx Exxx These represent the direct or indirect reference to data operands. Direct Register Reference Instructions When M bit is 0 and the Op-Code bits are “111”, the instruction is identified as the register reference instructions. With the rest 12 bits using 1 hot code can have upto 12 distinct instructions. The decoded opcode is ‘D7’ with M bit as ‘0’. Different instruction along with the hex code is shown in table below.: M bit OpCode Bits(14 – 12) Decoder output Rest 12 bits Hex Code Mnemonic Code Description 0 0 0 0 0 0 0 0 0 0 0 0 111 111 111 111 111 111 111 111 111 111 111 111 D7 D7 D7 D7 D7 D7 D7 D7 D7 D7 D7 D7 100000000000 010000000000 001000000000 000100000000 000010000000 000001000000 000000100000 000000010000 000000001000 000000000100 000000000010 000000000001 7800 7400 7200 7100 7080 7040 7020 7010 7008 7004 7002 7001 CLA CLE CMA CME CIR CIL INC SPA SNA SZA SZE HLT Clear Accumulator Clear E Complement Acc Cmplement E Circulate Right Acc Circulate Left Acc Increment Skip if +ve Skip if –Ve Skip if zero Skip if E=0 Halt Input-Output Instructions I/O instructions are needed for transferring to and from the accumulator, it is also used for status check of an instruction execution such as zero or carry flag status. The I/O instruction is identified when D7=’1’ and the mode bit M=1. Different instruction along with the hex code is shown in table below. M bit OpCode Bits(14 – 12) Decoder output Rest 12 bits Hex Code Mnemonic Code Description 1 1 1 1 1 1 111 111 111 111 111 111 D7 D7 D7 D7 D7 D7 100000000000 010000000000 001000000000 000100000000 000010000000 000001000000 F800 F400 F200 F100 F080 F040 INP OUT SKI SKO ION IOF Input char to Acc Output char from Acc Skip on input flag Skip on output flag Interrupt ON Interrupt OFF ***Reference Computer system Architecture by M. Moris Mano page 135 Instruction Set Completeness A computer system should support a set of instructions so that the user can write computer programs to evaluate any function that is known to be computable. Instruction set of a computer is said to be complete if it includes a sufficient number of instructions in each of the following categories. Arithmetic, Logical and shift instructions Data Transfer instructions to move data from to the memory program control instructions used for branching or changing the sequence of the execution of the program. Input output instructions to read or write information from or to the i/o devices. The instruction set provided in the beginning is a minimum set of instructions for a basic machine, although it has complete instruction types, but is not an efficient as it does not include most frequently used operations like subtract, multiply, OR, Ex-OR etc. These operations are performed using at least two or more of the above set of instructions. For example: NAND Operation -> performed by using (i) AND and (ii) complement CMA instructions. Subtract operation -> 1’s and 2’s complement operation is performed using ADD and complement instructions. Program control operations-> performed using branch together with the skip instructions(SPA, SNA, SZA, SZE) A computer with instruction set completeness would have included more such instructions Share on Facebook Share Send email Mail Print Print