The basic structure of a computer can be well described with the help of the figure-2. It consists of the CPU, the system bus and the peripherals all interconnected in some well-defined way to form a complete computer system. The CPU is the black box of the complete system doing all complex but useful tasks. It includes the arithmetic and logic unit for performing all operations of simple to complex arithmetic including scientific. Control unit and internal register is also part of the CPU.
The system bus is basically a set of wire used to carry various information and control signal among various units inside the computer system. Depending on the type of information carried the bus can be categorizes as address Bus, data bus, and control bus.
Address bus carries the address information of the peripheral devices or memory locations. The size of the bus decides the amount of memory supported for the system. A 16-bit address bus can address 216 = 64 Kilo byte of memory, 20-bit bus can address 1MB whereas a 32-bit can address 232 or 4 Giga Bytes of memory. This also limits the amount of internal or primary memory in the system. Address bu is unidirectional and the address generated by the CPU can point in only one direction. They are outwards from the CPU.
The data bus is used to carry the information or data from memory or other peripheral to CPU and vice versa. The size of the bus varies from a nibble, byte to multi-byte bus. Internal data bus for some of the processors is as follows:
The data bus in all the microprocessors is bidirectional that it can carry data from CPU to peripheral or vice versa.
The control signals are generated inside the control and timing unit. These signals are used to initialize, synchronize or give status of operation in the CPU and the peripherals. Some of the important control signals are address latch enable(ALE), IO/M’, write (WR’), read (RD’), hold request (HOLD), hold acknowledgement (HLDA) etc.
Many years ago, the United States government asked Harvard and Princeton Universities to suggest a computer architecture to be used in computing tables of US Naval. The two universities came up with two architectures known as von Neumann Architecture (also names “Princeton Architecture”) and Harvard Architecture. These architectures are different in the way the memory is accessed.
Figure-3 shows how to access memory system of the Harvard architecture. As there are separate bus for the data and program memory, it adds some kind of parallelism because both the program and the data memory can be accessed simultaneously.
Harvard’s response was a design that used separate memory banks for program store, the processor stack, and variable RAM.
The Von Neumann architecture’s largest advantage is that it simplifies the microcontroller chip design because only one memory is accessed. For microcontrollers, its biggest asset is that the contents of RAM (random-access memory) can be used for both variable (data) storage as well as program instruction storage.
An instruction specifies the operation to be performed along with the operands. The set of instructions are called the program. The program and data are stored in the memory, this brings to us another term known as “stored program concept” Figure-5 shows a system having a single register having its instruction format consisting of two parts, one part is OPCODE of 4-bit size and second part used for reference of the variable having 12-bits. With 12-bits we can have a memory of 4096 bytes.
The model shown uses one processor register called accumulator. CPU operate on two operands one of them being the memory operand and another being the accumulator. If the operand is not needed from the memory then the 12-bits can specify the immediate operand. only on the contents of the accumulator such as complement accumulator. The operation in such case is either accumulator and memory or accumulator and immediate data.
The instruction executes as ACC <– ACC op M[AR], or ACC <– ACC op number. In any case the partial results are stored in the accumulator.