Generating PORT Address for I/O


Generating the Ports for interfacing

There are two techniques or methods for interfacing i/o devices, these are:

  1. i/o-Mapped I/O- In this method, the i/o device have separate address space and instructions exclusively for inputting or outputting the data from/to the devices. Instructions for reading/writing memory are different than i/o instructions.IN and OUT are used for i/o devices, and MOV is used for memory related operations.
  2. memory-mapped I/O- This techniques uses the common address space and instructions for communicating with the memory or the i/o. MOV instruction is used for i/o as well as memory related operations.

In the following paragraph we will learn how to create the port addresses for the i/o-mapped i/o technique. We will use some address decoding logic gates for port address decoding,  an input buffer IC such as 74LS 244 to interface the keyboard and an output latch such as 74LS373 to interface output device (LEDs).

  1. Interfacing 8-dip switch :

Interfacing 8-dip switches logic gates as address decoder: Suppose that the 8-dip switches is connected to the 74LS244 an input buffer which is identified by the address FFFEh. The figure-1 shows the decoding mechanism and the connections to 74LS244 and KB

Also shown in figure-1 is interfacing the 8-dip switches employing an input buffer 74LS244. 74LS244 has two quad input buffer which are selected using the 1G’ and 2G’ low select inputs. Once selected the inputs on pins 1A1…1A4 and 2A1….2A4 are outputted on 1Y1…1Y4, 2Y1…2Y4. 1G’ and 2G’ are connected to the address decoding logic gate. As per the connections provided to logic gate the address of the 74LS244 IC is FFFEh.Figure-1 Interfacing 8-dip switches

Also note that IOR’ is also connected to the decoding logic gates for IO read operation. Programmer can now input the data from the 8-dip switch in the following way.

IN AL, FFFEh; direct port addressing

or

MOV DX, FFFEh

IN AL, [DX]

2.  Interfacing 8-LED to 8086 using an output latch

In the following figure address decoding logic gates are connected to the 16-address lines. The two least significant address lines are connected through inverters. Thus providing the port address  as FFFCh.

Figure-2: interfacing 8-LED to 8086

Also note that the IOW’ line is connected to the decoding gates thus performing IO write operation. Programmer can display the data on LEDs using the following instruction for 8086 system.

MOV AL, 55h

OUT FFFC, AL           ; this will illuminate LEDs as 01010101

or

MOV DX, FFFCh      ; indirect addressing(port address in DX)

OUT DX, AL   ; for 8-bit operation

or

OUT DX, AX ; for 16-bit operation

3. Port generation using a decoder

a). Introduction to 74LS138 a 3×8 decoder

It is used in high performance memory decoding or data-routing applications requiring very short propagation delay times. 74LS138 decode one of eight lines dependent on the conditions at the three binary select inputs and three enable inputs G1, G2A’, G2B’.

Figure-3: 74LS138 for port generation

 

b) Generating Port Addresses using 74LS138 a 3×8 decoder

Now, we’ll use the 74LS138 a 3×8 decoder whose select lines and the enable lines as connected in figure-4. With this configuration the port address generated are shown in the following table

Port Addresses

A7
A6
A5
A4
A3
A2
A1
A0
Address
C
B
A
1
0
0
0
1
0
0
0
88h
1
0
0
0
1
0
0
1
89h
1
0
0
0
1
0
1
0
8Ah
1
0
0
0
1
0
1
1
8Bh
1
0
0
0
1
1
0
0
8Ch
1
0
0
0
1
1
0
1
8Dh
1
0
0
0
1
1
1
0
8Eh
1
0
0
0
1
1
1
1
8Fh

 

As seen from the above table the port address provided by the 74LS138 is from 88h to 8Fh. We can connect 8-i/o devices at these addresses. These address lines may also be used along with IOR’ and IOW’ to provide read or write operations. Input buffers and output latch can be used as in above examples.

Figure-4: Generating io port address using 74LS138 decoder

We can connect 8 peripherals one on each output of the 74LS138 decoder with IOR’ and IOW’ for read and write operations on these peripherals devices.

The standard IN and OUT instructions could be used for read and write operations.

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