PIC Instruction Set:

PIC is RISC based architecture supporting only 35 instructions. These instructions can be classified in the following categories:

1. Register File Operations:

Byte oriented operations

Bit oriented operations

Literal and control operations

2. Based on Functions

Data Transfer Operations

Arithmetic Operations

Logical Operations

Shift and Rotate

Branch and Return

These instructions are shown in the

Byte-Oriented Operations
Mnemonic	Description	Cycles	14-bit OPCode	Status Affected
ADDWF  f,d	Add W and F	1	0 0111 dfff ffff	C, DC, Z
ANDWF   f,d	Logical AND W with f	1	000101 dfff ffff	Z
CLRF       f	Clear f	1	0000011fff ffff	Z
CLRW	Clear W	1	00 0001 0xxx xxxx	Z
COMF     f,d	Complement f	1	00 1001 dfff ffff	Z
DECF      f,d	Decrement f	1	00 0011 dfff ffff	Z
DECFSZ  f,d	Decrement f and skip if zero	1(2)	00 1011 dfff ffff
INCF      f,d	increment	1	00 1010 dfff ffff	Z
INCFSZ  f,d	Increment f, and skip if zero	1(2)	00 1111 dfff ffff
IORWF   f,d	Inclusive OR W with f	1	00 0100 dfff ffff	Z
MOVF    f,d	Move f	1	00 1000 dfff ffff	Z
MOVWF   f	Move W to f	1	00 0000 1fff ffff
NOP		1	00 0000 0xx0 0000
RLF     f,d	Rotate Left through carry	1	00 1101 dfff ffff	C
RRF     f,d	Rotate right through carry	1	00 1100 dfff ffff	C
SUBWF   f,d	Subtract W from f	1	00 0010 dfff ffff	C, DC, Z
SWAPF    f,d	Swap nibbles in f	1	00 1110 dfff ffff
XORWF   f,d	EXCLUSIVE or	1	00 0110 dfff ffff	Z

***If ‘d’ is 0, the result is stored in the W register. If ‘d’ is 1, the result is stored back in register ‘f’.***

 

Bit-Oriented File Register Operations
BCF    f, b	Bit Clear f	1	01 00bb bfff ffff
BSF    f, b	Bit Set f	1	01 01bb bfff ffff
BTFSC   f, b	Bit Test f, Skip if Clear	1(2)	01 10bb bfff ffff
BTFSS    f, b	Bit Test f, Skip if Set	1(2)	01 11bb bfff ffff

 

Literal and Control Operations
ADDLW    k	Add literal and W	1	11 111x kkkk kkkk	C, DC, Z
ANDLW    k	AND literal with W	1	11 1001 kkkk kkkk	Z
CALL       k	Call subroutine	2	10 0kkk kkkk kkkk
CLRWDT  –	Clear Watchdog Timer	1	00 0000 0110 0100	TO’, PD’
GOTO    k	Go to address	2	10 1kkk kkkk kkkk
IORLW    k	Inclusive OR literal with W	1	11 1000 kkkk kkkk	Z
MOVLW   k	Move literal to W	1	11 00xx kkkk kkkk
RETFIE    –	Return from interrupt	2	00 0000 0000 1001
RETLW    k	Return with literal in W	2	11 01xx kkkk kkkk
RETURN	Return from Subroutine	2	00 0000 0000 1000
SLEEP	Go into standby mode	1	00 0000 0110 0011	TO’,  PD’
SUBLW    k	Subtract W from literal	1	11 110x kkkk kkkk	C, DC, Z
XORLW    k	Exclusive OR literal with W	1	11 1010 kkkk kkkk	Z