Structure of VHDL Code Digital Design using VHDL by Ravinder Nath Rajotiya - May 10, 2021May 13, 20210 Lecture-3 Structure of VHDL Code A general structure of the VHDL code is shown in figure Structure of VHDL program --Library clause is used to declares the name as a pre-defined/or user-defined library. LIBRARY<library_Name>; -- Library IEEE will be used almost in every code -- we need to import one or more packages from different libraries as given below USE<library_name>.<package_name>.ALL; --this is the format for importing packages USEIEEE.STD_LOGIC_1164.ALL; -- this package is required for bit, std_logic, --& std_logic_vector declarations and some related operations -- arithmetic functions with Signed or Unsigned values USEIEEE.NUMERIC_STD.ALL; -- then we declare the entity ENTITY<entity_name>IS --the entity can have generic for constant declaration and input output port declaration GENERIC( generic_name : generic_type : generic_value); PORT ( <signal_name> : mode <type>; <signal_name> : mode <type> := default_value; <signal_name> : INOUT<type>; <signal_name>
History and Features of VHDL Digital Design using VHDL by Ravinder Nath Rajotiya - May 10, 20210 History and Features of VHDL The Requirement The development of VHDL was initiated in 1981 by the United States Department of Defence to address the hardware life cycle crisis. The cost of re-procuring electronic hardware as technologies became obsolete was reaching crisis point, because the function of the parts was not adequately documented, and the various components making up a system were individually verified using a wide range of different and incompatible simulation languages and tools. The requirement was for a language with a wide range of descriptive capability that would work the same on any simulator and was independent of technology or design methodology. Standardization The standardization process for VHDL was unique in that the participation and feedback from industry was sought at an early