Arithmetic Micro-operation RTL notation description Addition R3 <-- R1 + R2 Content of R1 and R2 added, result in R3 Subtraction R3 <-- R1 - R2 Content of R2 subtracted from content of R1 added, result in R3 1’s complement R2  <--  R2’ Content of R2 complemented 2’s complement R2  <-- R2’ +1 2’s complement on the Content of R2 Subtraction using 2’s complement R3  <-- R1 + R2’ + 1 Subtraction using 2’s complement Increment R1   <--  R1+1 An increment micro-operation Decrement R1   <--  R1 - 1 A decrement micro-operation   We now describe the arithmetic circuits for performing the above arithmetic micro-operations. A Half adder and full adders are the basic building blocks used in above operation. Half Adder: A half adder is an arithmetic circuit used to add two binary bits. These bits are carry-in and a bit of the number. The symbolic notation