8086 supports 1M byte of memory. To address 1MB, we need 20 address lines and the 20 bit address ranges from 00000000000000000000 –to- 11111111111111111111 i.e. 00000h to FFFFFh. The memory is constructed using RAM and ROM /EEPROM chips. 1MB  memory can be contagiously organized as memory or can be organized in banks of odd and even address memory so as to access 8 or 16 bit of data. The 8-bit data thus we can either access bytes from even address on data lines D0-D7 and data from odd address on the data bus D8-D15.

Approached to Memory organization:

i.  As one contiguous block:

Memory can be organized as one contiguous block of memory as in 8085 based systems. In this case 8-bit data can be read in one machine cycle, to read to-byte (16-bit) data two machine read cycle will be required.

ii. Odd-Even Memory Banks:

Another approach is to organize the memory in two block one referring to even address and another pointing to odd addresses. These two blocks are called odd memory bank and even memory bank.

8086 microprocessor provides BHE’ and A0 signals to enable odd or even bank memory. Memory blocks are selected as per the bit combination on BHE’ and A0 pin. Table shows the function of BHE’ and A0 on bank operations.

Read / write operation:

Read / write operation may be performed in one or two machine cycles depending on whether data is located in even or odd memory bank and also whether 8-bit or 16-bit data is to be read/written. If the data is residing starting at even memory bank, then 16-bit data can be read/written in a single machine cycle. But, if the 16-bit data is to be read/written starting at odd address then will require two machine cycle. Low order data read on high order data bus during the first cycle and the high order data read on low order data bus in another cycle.

Simplified memory organization diagram of 8086

Figure below shows a simplified diagram of 8086 system connected to odd and even bank of the memory. BHE’ and A0 lines are connected to the odd and even bank respectively. Now, as per the instruction being executed and depending on whether size of the data to be read/written from/to the memory either odd or even or both the banks of memory will be selected.

Address lines A19 – A1 are connected to address lines of the two memory banks. The lower bit of the address bus is connected to CS’ of even bank for chip selection, thus ensuring only even address memory locations are accessed from even bank. BHE’ is used for chip select signal of the odd memory bank, this ensures that odd memory locations are selected from this bank.