Delay Loops in 8085

Loop is used in 8085 for repeating the execution of a set of instructions. Loops are also used in generating the delays in 8085. The Loop is implemented by using the DCR and some conditional JMP instructions. A simple Loop is shown below

MVI A, 00

MVI C, 05

Again:          DCR C

           ADD C

JNZ again

This program make use of a add instruction inside a loop which executed five times. At the end of the loop addition of five numbers 0 to 5 is obtained which is 15.

We can also use loop to generate delay time for some applications. The delay is actually the total ‘T’ states times the clock period. i.e.

TL = time when condition is true (T  x T-states x NC)  – time when condition is FALSE (T  x T-states x NC)

Where

TL       = delay time generated in loop

T          = clock period

T-states = total number of T states for the instructions in the loop

NC = loop count in decimal

Example

Line No	Label	Mnemonic	Operands	T-states required for execution
1		MVI	A, 00	7
2		MVI	C, 05	7
3	Again :	ADD	C	4
4		DCR	C	4
5		JNZ	Again	If true 10 T-states If false 7 T-states

Total execution time of loop which is time in executing code from line 2 to line 4. Loop executes 5 times as reg-C=05. Assume clock frequency = 2MHz. So, T= 1/2000000 =  0.5 uS

TL= NC x T x T-states

            = 255 x 0.5×10^-6 x 18  = 0.002295

TLA = TL – The difference of T-states for JNZ  instruction (10 – 7)* T ie. When JNZ goes false

            0.002295– 3x.5×10^-6 =   0.002295 –  0.0000015

            = 0.0022935 seconds = 2293.5 us

This may also be calculated as total T-states executed for NC-1 times plus T-states when JNZ is going false ie 7+4 +4 = 15 times the T

0.002286+ 0.0000075 = 0.0022935 = 2293.5 us

 

Delay Time using Register pair:

Delay time calculation using register pair is similar in approach to that of using only single 8-bit register. The exception is that use of pair of register will load 16-bit count value.

For example try understanding the following code

label	Mnemonics	T states	Comments
	LXI      B, 2384            h	10	Load 16-bit data in register pair BC 2384h = 9092 in decimal
LOOP1:	DCX    B	6	Decrement the register pair BC
	MOV   A, C	4	Move C in A
	ORA    B	4	OR A with B to set zero flag
	JNZ      LOOP1	10/7
Total T states in one loop		24 T states when JNZ is true 21 T states when JNZ is false

Delay Time : T{(NC-1)*24  + 21}

In the above program count in register-B = 2384H    = 2X16^3 + 3*16^2  +  8 *16^1  +  4*16^0

                                                                                    =  8192      +  768      +   128     +  4

                                                                                    = 9092

Delay time       = 0.5*10^-6 {(9092-1)* 24  + 21}

                        =   0.5*10^-6 { 2,18,184 + 21}          =  0.5*10^-6 * 2,18,205

                        =          0.1091025 seconds = 109 ms

Delay using Loop within Loop

Delay time can also be achieved using loop with a loop. In this case two count values are set up in two registers say for example reg-B and reg-C, and two loops will be created. The inner loop will execute reg-C times with every one count of reg-B value. Thus the total iterations will be reg-B * reg-C times. Here is how to use loop within loop for delay time generation.

 MVI B, 38h               7T

Loop2 :            MVI C, FFh                7T

Loop1 :            DCR C                                    4T

                        JNZ  Loop1                10/7T

                        DCR B                                    4T

                        JNZ loop2                   10/7T

The delay count in reg-C is FFh, so the delay in inner loop TL1 is

TL1 : 0.5us  {( 254*14   + 11)}  = 0.0017835  sec =  1783.5us

Total delay = (outer loop count)* {TL1 + 0.5us  21}

            =  56 *    0.0017835     +  0.5us *21

            = 0.100464 seconds

            = 100.464 ms

Calculating the count value for counter given the delay time:

Generally the delay loop includes two instructions DCR and JNZ, more instructions can be part of the loop depending upon the application. The delay count which is to be loaded in the counter can also be calculated using the formula:

Total delay time = delay time inside the loop  + delay time outside the loop.

The instructions outside the loop will be executed only once but execution of the instruction inside the loop depends on the lop count.

TD = TO + TL

       = T(clock-period) * T-states(outside loop)  + T(clock-period) {(counte-1)T-states(true condition) + T-states(false condition)}

= T(clock-period) { T-states(outside loop)  + (counte-1)T-states(inside loop for true JNZ condition) + T-states(inside loop for false JNZ condition)}

Example:

Write a program to count continuously in hexadecimal from FF to 00 in a system with 0.5us clock period. Use register C to set up the a one ms delay between each count display the number at one of the port#.

Solution :

The delay count for generating 1ms delay

1ms = TO  +  TL

Ignoring the false condition of JNZ

        = T * T-states(outside loop)  + T*T-state(inside loop) * Nc

Let us write the program for display the hex number on output port with 1ms delay

MVI B, 00h                                      7-T

nxtNum :         DCR B                     4-T

                        MVI C, COUNT        7-T

Delay:              DCR C                       4-T

                        JNZ delay                   10/7-T

                        MOV A, B                   4-T

                        OUT port#                 10-T

                        JMP nxtNum              10-T

Delay inside loop

TL = 0.5us{count-1)*14 + 11} and ignoring JNZ false condition   TL = 0.5us (count-1)*14

Delay outside loop (because of DCR B, MVI C, count; MOV A, B; OUT port#; JMP)

 TO = T * T-states

=     0.5us * 35  = 17.5us

TD = TO + TL

1ms = 17.5us + 0.5us{count-1)*14 + 11}

            = 17.5us + 0.5us * count* 14 – 0.5us * 3

            = 17.5us  – 1.5us + 0.5us * count* 14

            = 16 us + 0.5us * count* 14

Count = (1ms – 16us ) / (7us)

            = 140.57    =  8Dh

So, we have to load register C with 8Dh to get a 1ms delay between each digit delay.