Schematic Design Entry in VHDL

Schematic Design Entry in VHDL

  1. Open the ISE project navigator by double clicking on the icon
  2. Go to file Click new project, Type the name of the project in new project window and click next.
  3. Select device family, device, package, speed grade and design flow and click next in the design properties window.
  4. Click next and then click finish
  5. Click new source ( from Design pane, or project menu-> new source
  6. Click Schematic entry , Type file name, add to project, then click next
  7. Click finish
  8. A new schematic design entry window opens


How to draw schematic:

Under the categories in schematic drawing window, there are variety of symbols like counters, decoders, logic etc

Select anyone.

Click on “Symbol info” in the middle left side window, A pdf file will open showing its working.

Here you do not refer in terms of TTL IC   numbers, but talk in terms of various blocks.. The procedure for drawing is:

a. Select a category

b.  Place the symbol (for TTL IC no. 74LS192 counter) on the workspace.

c. Draw wires for inputs and outputs

d. Place I/O markers for i/p, o/p pins, which you need externally

e. Place Vcc, and GND for input pins which are permanently HIGH or LOW. Ensure you draw wires before connecting i/o markers

f.  i/o markers for i/p pin   

g.  i/o markets for output pinh. Double click the i/o marker for editing

9. Select 4-bit counter “cb4cled” by selecting counter in categories in symbols.

  1. Place wires on i/o and then place I/O markers
  2. Edit pin names double clicking on i/o marker.
  3. Use BUS Taps or I/O slice to bring only relevant signal to IO pin say 1 O/P out of 8 O/Ps of a shift register.
  4. Bus Taps and I/O markers are available on schematics window <- Bus & Taps 
  5. After drawing click on Sources and processes tab to the left and double click synthesizer & run the schematic to check syntax error. Debug for errors if any and rerun.
  6. Goto Project-New Sources and click Implementation Constraint file. It will generate UCF file for your schematic.
  7. Click + beside file_name.vhd then click file_name.ucf
  8. In the processes tab click + on user constrain and double click edit user constraint to open blank ucf file. Type all the pin entries for the used i/o pin
  9. Double click implement design in process tab and debug errors if any.
  10. Connect the FPGA Kit to printer port of PC and connect the power supply to kit. Switch on the power supply.
  11. Double click Generate programming file.
  12. Run Configure Device (iMPACT)




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