GGSIPU Mid-Term-1 April 2022 Solution Microprocessors by Ravinder Nath Rajotiya - April 11, 2022April 11, 20220 Solution MT-1 April 2022 ETEE 310 Microprocessors and Microcontrollers Time 1.5 Hours MM: 30 Q1. Differentiate between PC and SP Sl PC SP 1 Program counter (PC) points to the next instruction in memory to be executed Stack Ponter(SP) points to the top of the stack memory from where an item could be accessed 2 It is auto incremented for normal sequential program Incremented for PUSH and for POP operation an item accessed and the SP decremented for stack-up configuration Q1. (b) Briefly describe different memory technologies used in microprocessor system. A microprocessor system does not contain any memory internally other than the set
De-Multiplexing the Address and Data bus 8085 8085 Microprocessor by Ravinder Nath Rajotiya - February 22, 2022February 23, 20220 Introduction 8085 is an 8-bit microprocessor an address a maximum of 216 = 65536 memory location. It has a total of 16-pin on the package which will be used to carry both the address as well as the data. The low order address lines are multiplexed with 8-data lines and hence the pin 11 to 19 on the 8085 microprocessor IC are numbered as AD7 - AD0 (pin 12-19), whereas the high order bus is marked as A15 - A8 (pin 21-28) as shown in following cut-section diagram. For accessing the memory full 16-bit address value must appear at once on pins A15 – A0 but the lower byte is not exclusively available to carry the address, it also carries the data. It
Delay Time using 8085 Programming Loops 8085 Microprocessor by Ravinder Nath Rajotiya - October 13, 2021September 29, 20230 Delay Loops in 8085 Loop is used in 8085 for repeating the execution of a set of instructions. Loops are also used in generating the delays in 8085. The Loop is implemented by using the DCR and some conditional JMP instructions. A simple Loop is shown below MVI A, 00 MVI C, 05 Again: DCR C ADD C JNZ again This program make use of a add instruction inside a loop which executed five times. At the end of the loop addition of five numbers 0 to 5 is obtained which is 15. We can also use loop to generate delay time for some applications. The delay is actually the total ‘T’ states times the clock period. i.e. TL =
Generating PORT Address for I/O Microprocessor and Interfacing by Ravinder Nath Rajotiya - October 12, 2021October 12, 20210 Generating the Ports for interfacing There are two techniques or methods for interfacing i/o devices, these are: i/o-Mapped I/O- In this method, the i/o device have separate address space and instructions exclusively for inputting or outputting the data from/to the devices. Instructions for reading/writing memory are different than i/o instructions.IN and OUT are used for i/o devices, and MOV is used for memory related operations. memory-mapped I/O- This techniques uses the common address space and instructions for communicating with the memory or the i/o. MOV instruction is used for i/o as well as memory related operations. In the following paragraph we will learn how to create the port addresses for the i/o-mapped i/o technique. We will use some address decoding logic gates for
Experiment-1 8085 Microprocessor 8085 MPI Lab by Ravinder Nath Rajotiya - March 10, 2021June 3, 20210 Experiment-1: To draw and explain-(i)Block diagram and pin diagram of 8085. ii. Instruction Set 8085 Objective: To familiarize with 8085 microprocessor internal blocks and their use To Learn with the pin diagram of 8085 and their use To understand the instruction set to analyze how and where to use the instructions. Explanation: Internal Block diagram of 8085 - L-3 Internal Architecture of 8085 8085 Microprocessor - Care4you PIN Diagram of 8085: 8085 PIN and Signal Description 8085 Microprocessor - Care4you Instruction set of 8085. The different instructions under data transfer category are listed in table below: Sl Data Transfer instructions Arithmetic instructions JUMP instructions Call instructions Logical instructions Flag and M/C control instructions 1 MVI Reg/Mem,8-bit data ADDReg/Mem JMP Addr/Lbl Call Addr CMP opr CLC 2 MOV Rd, Rs ADC Reg/Mem CALL Addr/Lbl CC CPI Immidiate_opr CMC 3 MOV Rd, M ADI 8-bit data RET CNC ANA opr STC 4 LXI Rp,16-bit Data ACI 8-bit data RST