L-7 Interrupts in 8085 and interrupt cycle


Interrupt is one of the most common methods for an external device to communicate with the processor. Figure below shows a general concept of the interrupt in our day-to-day activity. Suppose you are enjoying listening to music, if now your phone bell rings, you stop or pauses your music and attends the phone, after conversation is completed, you restart your paused audio and continue listening the music.

You do not pause your audio every minute to check if phone bell is ringing, which would be an inefficient and slow method.  Your computing device behaves a similar way.

Interrupt in 8085:

We can define interrupt as a process or techniques using which an external slow speed device seek the attention of the microprocessor to informs that it is ready for communication with it. This process of interrupt is generally initiated by an asynchronous in nature. The response to this signal is controlled by the processor wherein it may be rejected or accepted depending on the priority of the interrupt.

The figure 3.2 shows the complete steps in interrupt process, these are:

  • Processor executing main program
  • The peripheral request for service in the form of an interrupt
  • After completing the current task, the processor suspends the program in execution and saves the return addresses
  • Load the PC with the address of ISR and jumps to execute the ISR
  • Execution continues till an end of interrupt instruction is encountered
  • The return address from stack is restored in PC
  • The execution of main program continues

There are two ways a CPU can interact with the external devices that are connected to it. One method is polling and the second interrupt.

Polling: In this method the processor will be checking at regular intervals if any of the external device needs service. With this method the processor will be wasting most of its time checking the device instead of doing some useful tasks.

Interrupt: The processor can continue it productive task. Whenever any device wishes to communicate, it will do so by requesting the attention of the CPU. The request may go unnoticed if the processor is executing some higher priority tasks or may give its attention (processing time) and requested service provided to the device. When the processor listens to the interrupt it suspends its current job and takes care of interrupting device. Once the required service is given to the device, the processor goes back to handle the previously executing task.

Types of interrupts in 8085

There are two types of interrupts in 8085 microprocessor, these are hardware interrupt and the software interrupts.

Software Interrupts: Software interrupts are the interrupts instructions inserted in the main program and when these instructions are encountered a software interrupt take place.

Hardware interrupts: hardware interrupts are as a result of the request from the peripherals. These are externally initiated signals. 8085 supports the following 5 types of hardware interrupts:

  • TRAP
  • RST 7.5
  • RST 6.5
  • RST 5.5
  • INTR

In addition to these interrupts, there is an interrupt acknowledgement (INTA’) pin on the 8085 IC. These interrupts are further classified as:

  • Maskable and non-maskable interrupts
  • Vectored and non-vectored interrupts.

The table below shows the difference between the maskable and non-maskable interrupts.

Maskable Interrupt
Non-Maskable Interrupt
These interrupt types can be enabled and disabled by EI and DI instructions
These interrupts cannot be disabled
These can be individually masked by SIM instructions
These cannot be masked
RST 7.5, RST 6.5, RST 5.5, INTR are all maskable interrupts in 8085
TRAP is a non-maskable interrupt in 8085

Then these interrupts can be further classified as vectored and non-vectored interrupts. Vectored interrupts are those interrupt whose vector address is known to 8085 whereas non-vectored interrupts are those whose ISR address is to be supplied by interrupting device. The difference between the vectored and non-vectored interrupts is given below:

Vectored Interrupts
Non-Vectored Interrupts
The ISR address for these interrupts is known to 8085
The  ISR address is to be supplied by interrupting device
TRAP, RST 7.5, RST 6.5, RST 5.5 are examples of vectored interrupts
INTR is a is a non-vectored interrupt in 8085
Priority of the interrupts is TRAP, RST 7.5, RST 6.5, RST 5.5
Priority depends on daisy chain or software assigned priority



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