Magnitude Comparator

Magnitude Comparator:

A magnitude comparator is a combinational circuit that compares two binary numbers and determines their relative magnitude. The schematic block diagram in figure-1 has two inputs and three outputs. It compares two numbers for equality, less than and greater than conditions. Depending on the comparison, one of the output will be true and the others will be false.

Figure-1: Magnitude Comparator Symbol

 

The table-1 gives the function of the two 1-bit magnitude comparison.

A
B
 GT   (A>B)
LT   (A
EQ    (A=B)
0
0
0
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
AB’
A’B
A’B’ + AB= (A ⊙ B)

The logic equations for the three output are:

GT  =  AB’

LT   =  A’B

EQ  = A’B’ + AB

= A  ⊙   B

Figure-2: 1-bit magnitude comparator

2-bit Comparator

This type of comparator is used to compare two numbers of 2-bits each. The table below shows the comparison.

Functional table for two bit comparison

Input A Input B Outputs
A1 A0 B1 B0 GT   (A>B)  LT  (A<B) EQ  (A=B)
0 0 0 0 0 0 1
0 0 0 1 0 1 0
0 0 1 0 0 1 0
0 0 1 1 0 1 0
0 1 0 0 1 0 0
0 1 0 1 0 0 1
0 1 1 0 0 1 0
0 1 1 1 0 1 0
1 0 0 0 1 0 0
1 0 0 1 1 0 0
1 0 1 0 0 0 1
1 0 1 1 0 1 0
1 1 0 0 1 0 0
1 1 0 1 1 0 0
1 1 1 0 1 0 0
1 1 1 1 0 0 1

GT  = A1’A0B1’B0′ + A1A0’B1’B0′ + A1A0’B1’B0 + A1A0B1’B0′ +A1A0B1’B0 + A1A0B1B0′
LT  = A1’A0’B1’B0 + A1’A0’B1B0′ + A1’A0’B1B0 +A1’A0B1B0′ + A1’A0B1B0 + A1A0’B1B0
EQ = A1’A0’B1’B0′ + A1’A0B1’B0 + A1A0’B1B0′ + A1A0B1B0
The Simplifications for the above Boolean equations:

Simplified Boolean Equations for comparator

(a).       A>B

G=A1B1′ + A0B1’B0′ + A1A0B0′

= A1B1′  + B0′ (A0B1′ + A1A0)

(b)        A<B

L=A<B = A1’A0’B0  + A0’B1B0 +A1’B1

(c )       A==B

E =  A1’A0’B1’B0′ + A1’A0B1’B0 + A1A0’B1B0′ + A1A0B1B0
=          A’1A’0B’1B’0 + A’1A0B’1B0 + A1A’0B1B’0  + A1A0B1B0
=          A’0B’0( A’1B’1 + A1B1) + A0B0( A’1B’1+A1B1)
=          ( A’1B’1 + A1B1)( A’0B’0 + A0B0)
=          (A1 ⊙ B1) ( A0 ⊙ B0)

2-bit Magnitude Comparator circuit

Figure :2-bit Magnitude Comparator circuit

 

 4 bit Magnitude Comparator

A combinational circuit that compares two numbers, A and B, and determines their relative magnitudes: A>B, A=B, or A<B

Let us assume two 4-bit numbers as given below:

A=A3A2A1A0

B=B3B2B1B0

The two 4 bit numbers are equal in magnitude if (A=B) : A3=B3, A2=B2, A1=B1, A0=B0
Also, we know from the above discussion that the equality of two one bit numbers can be found with the help of the following equation:

Ai
Bi
A>B
A
A==B
0
0
0
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
Ai.Bi’
Ai’. Bi
Ai’.Bi’+Ai.Bi

Let Xi represent equality =(Ai=Bi), referring to the above table condition for equality is

xi     =          AiBi + Ai’Bi’ which is XNOR output and may be written as given below.

=          (AiBi’ + Ai’Bi)’ which can be written using De’Morgan theorem as
=          (Ai’+Bi)(Ai+Bi’) which when expanded can be written as
=          Ai’Ai + Ai’Bi’ + AiBi + BiBi’
=          Ai . Bi + Ai’ . Bi’

G    = (A>B) = A3B3’ + x3A2B2’ + x3x2A1B1’ + x3x2x1A0B0’

L     = (A<B) = A3’B3 + x3A2’B2 + x3x2A1’B1 + x3x2x1A0’B0

Using a binary subtractor:

A-B>0, A-B=0, or A-B<0

If Ai=Bi then Xi=1 will represent the bits at ith position are equal, So we start with the MSB, for 4-bit numbers, If A3=B3, then we check X2 (i.e. A2B2+A’2B2′) if it is =1, the A2=B2, and proceed on till A0 and B0 are compared.
The steps used for finding the three conditions (1) A=B; (2) A>B; (3) A<B, we use the following three step process.  Starting at MSB
Step-1: If X3= (A3B3 + A3’B3′) ==1; the bit A3==B3; then check for X2 (i.e. A2B2+A2’B2′),  if X2 =1, then A2=B2, similarily check for equality of A1, B1 and finally A0 and B0 also, If the condition is satisfied for each bit position, then the two numbers are equal, else go to step-2.
Step-2:Check for greater than:
If ((A>B)==1)  i.e. (A3B3’ + X3A2B2’ + X3X2A1B1’+ X3X2X1A0B0’)==1 then the number A is greater than B, if the condition becomes false then goto step-3.
Step-3:
if ((A<B) ==1) i.e.  (A3’B3 + X3A2’B2 + X3X2A1’B1+ X3X2X1A0’B0)==1, that means the number A is less than B.
The logic circuit diagram to find the three conditions of magnitude comparison (==, <, > ) is shown in the following figure:

Figure-4: 4-bit magnitude comparator

 

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